Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6595638 |
1 |
|
|
T21 |
83 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4422856 |
1 |
|
|
T21 |
50 |
|
T29 |
93 |
|
T30 |
1461 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10457393 |
1 |
|
|
T21 |
130 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
561101 |
1 |
|
|
T21 |
3 |
|
T29 |
8 |
|
T30 |
266 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6586068 |
1 |
|
|
T21 |
83 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4432426 |
1 |
|
|
T21 |
50 |
|
T29 |
165 |
|
T30 |
1329 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1938858 |
1 |
|
|
T21 |
32 |
|
T29 |
106 |
|
T30 |
305 |
| auto[1] |
auto[0] |
auto[1] |
280876 |
1 |
|
|
T21 |
1 |
|
T29 |
3 |
|
T30 |
75 |
| auto[1] |
auto[1] |
auto[0] |
1932467 |
1 |
|
|
T21 |
15 |
|
T29 |
51 |
|
T30 |
758 |
| auto[1] |
auto[1] |
auto[1] |
280225 |
1 |
|
|
T21 |
2 |
|
T29 |
5 |
|
T30 |
191 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |