Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6585913 |
1 |
|
|
T21 |
83 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4432581 |
1 |
|
|
T21 |
50 |
|
T29 |
109 |
|
T30 |
867 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9130802 |
1 |
|
|
T21 |
111 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
1887692 |
1 |
|
|
T21 |
22 |
|
T29 |
87 |
|
T30 |
412 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6581825 |
1 |
|
|
T21 |
103 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4436669 |
1 |
|
|
T21 |
30 |
|
T29 |
131 |
|
T30 |
754 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1279588 |
1 |
|
|
T21 |
7 |
|
T29 |
28 |
|
T30 |
154 |
| auto[1] |
auto[0] |
auto[1] |
945007 |
1 |
|
|
T21 |
13 |
|
T29 |
39 |
|
T30 |
210 |
| auto[1] |
auto[1] |
auto[0] |
1269389 |
1 |
|
|
T21 |
1 |
|
T29 |
16 |
|
T30 |
188 |
| auto[1] |
auto[1] |
auto[1] |
942685 |
1 |
|
|
T21 |
9 |
|
T29 |
48 |
|
T30 |
202 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |