Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6584546 |
1 |
|
|
T21 |
84 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4433948 |
1 |
|
|
T21 |
49 |
|
T29 |
103 |
|
T30 |
1117 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9142768 |
1 |
|
|
T21 |
119 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
1875726 |
1 |
|
|
T21 |
14 |
|
T29 |
53 |
|
T30 |
551 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6605813 |
1 |
|
|
T21 |
97 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4412681 |
1 |
|
|
T21 |
36 |
|
T29 |
141 |
|
T30 |
1090 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1271730 |
1 |
|
|
T21 |
11 |
|
T29 |
59 |
|
T30 |
295 |
| auto[1] |
auto[0] |
auto[1] |
943070 |
1 |
|
|
T21 |
5 |
|
T29 |
43 |
|
T30 |
293 |
| auto[1] |
auto[1] |
auto[0] |
1265225 |
1 |
|
|
T21 |
11 |
|
T29 |
29 |
|
T30 |
244 |
| auto[1] |
auto[1] |
auto[1] |
932656 |
1 |
|
|
T21 |
9 |
|
T29 |
10 |
|
T30 |
258 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |