Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6545233 |
1 |
|
|
T21 |
108 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4473261 |
1 |
|
|
T21 |
25 |
|
T29 |
131 |
|
T30 |
1364 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10456285 |
1 |
|
|
T21 |
130 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
562209 |
1 |
|
|
T21 |
3 |
|
T29 |
7 |
|
T30 |
210 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
6570521 |
1 |
|
|
T21 |
98 |
|
T22 |
1 |
|
T23 |
1725 |
| auto[1] |
4447973 |
1 |
|
|
T21 |
35 |
|
T29 |
152 |
|
T30 |
1090 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1926988 |
1 |
|
|
T21 |
22 |
|
T29 |
77 |
|
T30 |
344 |
| auto[1] |
auto[0] |
auto[1] |
277707 |
1 |
|
|
T21 |
2 |
|
T29 |
4 |
|
T30 |
89 |
| auto[1] |
auto[1] |
auto[0] |
1958776 |
1 |
|
|
T21 |
10 |
|
T29 |
68 |
|
T30 |
536 |
| auto[1] |
auto[1] |
auto[1] |
284502 |
1 |
|
|
T21 |
1 |
|
T29 |
3 |
|
T30 |
121 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |