Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12369247	1			T35	319		T36	326		T37	185
all_values[1]	12369247	1			T35	319		T36	326		T37	185
all_values[2]	12369247	1			T35	319		T36	326		T37	185
all_values[3]	12369247	1			T35	319		T36	326		T37	185
all_values[4]	12369247	1			T35	319		T36	326		T37	185
all_values[5]	12369247	1			T35	319		T36	326		T37	185
all_values[6]	12369247	1			T35	319		T36	326		T37	185
all_values[7]	12369247	1			T35	319		T36	326		T37	185
all_values[8]	12369247	1			T35	319		T36	326		T37	185
all_values[9]	12369247	1			T35	319		T36	326		T37	185
all_values[10]	12369247	1			T35	319		T36	326		T37	185
all_values[11]	12369247	1			T35	319		T36	326		T37	185
all_values[12]	12369247	1			T35	319		T36	326		T37	185
all_values[13]	12369247	1			T35	319		T36	326		T37	185
all_values[14]	12369247	1			T35	319		T36	326		T37	185
all_values[15]	12369247	1			T35	319		T36	326		T37	185
all_values[16]	12369247	1			T35	319		T36	326		T37	185
all_values[17]	12369247	1			T35	319		T36	326		T37	185
all_values[18]	12369247	1			T35	319		T36	326		T37	185
all_values[19]	12369247	1			T35	319		T36	326		T37	185
all_values[20]	12369247	1			T35	319		T36	326		T37	185
all_values[21]	12369247	1			T35	319		T36	326		T37	185
all_values[22]	12369247	1			T35	319		T36	326		T37	185
all_values[23]	12369247	1			T35	319		T36	326		T37	185
all_values[24]	12369247	1			T35	319		T36	326		T37	185
all_values[25]	12369247	1			T35	319		T36	326		T37	185
all_values[26]	12369247	1			T35	319		T36	326		T37	185
all_values[27]	12369247	1			T35	319		T36	326		T37	185
all_values[28]	12369247	1			T35	319		T36	326		T37	185
all_values[29]	12369247	1			T35	319		T36	326		T37	185
all_values[30]	12369247	1			T35	319		T36	326		T37	185
all_values[31]	12369247	1			T35	319		T36	326		T37	185

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

230717826

1

T35

5249

T36

10432

T37

5920

auto[1]

165098078

1

T35

4959

T38

31710

T39

321597

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

97226755

1

T35

1896

T36

10432

T37

5920

auto[1]

298589149

1

T35

8312

T38

55786

T39

577003

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

391476148

1

T35

10208

T36

10432

T37

5920

auto[1]

4339756

1

T38

2645

T39

86164

T42

25176

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2535440	1			T35	59		T36	326		T37	185
all_values[0]	auto[0]	auto[0]	auto[1]	4615403	1			T35	119		T38	744		T39	87285
all_values[0]	auto[0]	auto[1]	auto[0]	504215	1			T35	48		T38	153		T39	10474
all_values[0]	auto[0]	auto[1]	auto[1]	4578129	1			T35	93		T38	871		T39	90082
all_values[0]	auto[1]	auto[0]	auto[1]	68215	1			T38	44		T39	1263		T42	385
all_values[0]	auto[1]	auto[1]	auto[1]	67845	1			T38	41		T39	1447		T42	404
all_values[1]	auto[0]	auto[0]	auto[0]	2544074	1			T35	21		T36	326		T37	185
all_values[1]	auto[0]	auto[0]	auto[1]	4605415	1			T35	160		T38	616		T39	87551
all_values[1]	auto[0]	auto[1]	auto[0]	499245	1			T35	28		T38	148		T39	10462
all_values[1]	auto[0]	auto[1]	auto[1]	4585375	1			T35	110		T38	1054		T39	88399
all_values[1]	auto[1]	auto[0]	auto[1]	67958	1			T38	23		T39	1361		T42	434
all_values[1]	auto[1]	auto[1]	auto[1]	67180	1			T38	63		T39	1286		T42	335
all_values[2]	auto[0]	auto[0]	auto[0]	2543591	1			T35	33		T36	326		T37	185
all_values[2]	auto[0]	auto[0]	auto[1]	4601571	1			T35	159		T38	761		T39	91407
all_values[2]	auto[0]	auto[1]	auto[0]	494106	1			T35	25		T38	121		T39	9559
all_values[2]	auto[0]	auto[1]	auto[1]	4594484	1			T35	102		T38	954		T39	85955
all_values[2]	auto[1]	auto[0]	auto[1]	68047	1			T38	35		T39	1337		T42	390
all_values[2]	auto[1]	auto[1]	auto[1]	67448	1			T38	44		T39	1407		T42	403
all_values[3]	auto[0]	auto[0]	auto[0]	2549945	1			T35	47		T36	326		T37	185
all_values[3]	auto[0]	auto[0]	auto[1]	4600614	1			T35	124		T38	772		T39	86411
all_values[3]	auto[0]	auto[1]	auto[0]	498063	1			T35	55		T38	128		T39	10301
all_values[3]	auto[0]	auto[1]	auto[1]	4584974	1			T35	93		T38	869		T39	90460
all_values[3]	auto[1]	auto[0]	auto[1]	67650	1			T38	38		T39	1387		T42	392
all_values[3]	auto[1]	auto[1]	auto[1]	68001	1			T38	44		T39	1309		T42	361
all_values[4]	auto[0]	auto[0]	auto[0]	2537173	1			T35	37		T36	326		T37	185
all_values[4]	auto[0]	auto[0]	auto[1]	4595712	1			T35	119		T38	820		T39	85036
all_values[4]	auto[0]	auto[1]	auto[0]	497578	1			T35	10		T38	123		T39	9125
all_values[4]	auto[0]	auto[1]	auto[1]	4603260	1			T35	153		T38	865		T39	94081
all_values[4]	auto[1]	auto[0]	auto[1]	68124	1			T38	39		T39	1346		T42	418
all_values[4]	auto[1]	auto[1]	auto[1]	67400	1			T38	41		T39	1325		T42	347
all_values[5]	auto[0]	auto[0]	auto[0]	2533915	1			T35	37		T36	326		T37	185
all_values[5]	auto[0]	auto[0]	auto[1]	4573498	1			T35	160		T38	836		T39	83402
all_values[5]	auto[0]	auto[1]	auto[0]	505968	1			T35	17		T38	96		T39	9759
all_values[5]	auto[0]	auto[1]	auto[1]	4620231	1			T35	105		T38	819		T39	94051
all_values[5]	auto[1]	auto[0]	auto[1]	67799	1			T38	38		T39	1393		T42	445
all_values[5]	auto[1]	auto[1]	auto[1]	67836	1			T38	45		T39	1338		T42	386
all_values[6]	auto[0]	auto[0]	auto[0]	2531685	1			T35	24		T36	326		T37	185
all_values[6]	auto[0]	auto[0]	auto[1]	4612661	1			T35	123		T38	763		T39	89694
all_values[6]	auto[0]	auto[1]	auto[0]	501094	1			T35	14		T38	107		T39	9752
all_values[6]	auto[0]	auto[1]	auto[1]	4588062	1			T35	158		T38	908		T39	88098
all_values[6]	auto[1]	auto[0]	auto[1]	68052	1			T38	41		T39	1426		T42	470
all_values[6]	auto[1]	auto[1]	auto[1]	67693	1			T38	41		T39	1282		T42	370
all_values[7]	auto[0]	auto[0]	auto[0]	2542237	1			T35	41		T36	326		T37	185
all_values[7]	auto[0]	auto[0]	auto[1]	4607336	1			T35	170		T38	1082		T39	87252
all_values[7]	auto[0]	auto[1]	auto[0]	501163	1			T35	34		T38	77		T39	9095
all_values[7]	auto[0]	auto[1]	auto[1]	4582515	1			T35	74		T38	587		T39	91152
all_values[7]	auto[1]	auto[0]	auto[1]	68016	1			T38	53		T39	1340		T42	377
all_values[7]	auto[1]	auto[1]	auto[1]	67980	1			T38	29		T39	1355		T42	373
all_values[8]	auto[0]	auto[0]	auto[0]	2535141	1			T35	23		T36	326		T37	185
all_values[8]	auto[0]	auto[0]	auto[1]	4617519	1			T35	116		T38	822		T39	86580
all_values[8]	auto[0]	auto[1]	auto[0]	490289	1			T35	13		T38	191		T39	10193
all_values[8]	auto[0]	auto[1]	auto[1]	4590632	1			T35	167		T38	714		T39	90347
all_values[8]	auto[1]	auto[0]	auto[1]	68498	1			T38	43		T39	1378		T42	418
all_values[8]	auto[1]	auto[1]	auto[1]	67168	1			T38	43		T39	1318		T42	389
all_values[9]	auto[0]	auto[0]	auto[0]	2538274	1			T35	11		T36	326		T37	185
all_values[9]	auto[0]	auto[0]	auto[1]	4607023	1			T35	145		T38	945		T39	87394
all_values[9]	auto[0]	auto[1]	auto[0]	496570	1			T35	26		T38	118		T39	8930
all_values[9]	auto[0]	auto[1]	auto[1]	4591885	1			T35	137		T38	708		T39	91662
all_values[9]	auto[1]	auto[0]	auto[1]	67702	1			T38	47		T39	1322		T42	394
all_values[9]	auto[1]	auto[1]	auto[1]	67793	1			T38	30		T39	1301		T42	409
all_values[10]	auto[0]	auto[0]	auto[0]	2535002	1			T35	26		T36	326		T37	185
all_values[10]	auto[0]	auto[0]	auto[1]	4590952	1			T35	151		T38	754		T39	89086
all_values[10]	auto[0]	auto[1]	auto[0]	506983	1			T35	8		T38	78		T39	10439
all_values[10]	auto[0]	auto[1]	auto[1]	4600993	1			T35	134		T38	985		T39	86807
all_values[10]	auto[1]	auto[0]	auto[1]	67408	1			T38	31		T39	1300		T42	420
all_values[10]	auto[1]	auto[1]	auto[1]	67909	1			T38	38		T39	1372		T42	370
all_values[11]	auto[0]	auto[0]	auto[0]	2541538	1			T35	34		T36	326		T37	185
all_values[11]	auto[0]	auto[0]	auto[1]	4602787	1			T35	82		T38	899		T39	86219
all_values[11]	auto[0]	auto[1]	auto[0]	500119	1			T35	22		T38	89		T39	8939
all_values[11]	auto[0]	auto[1]	auto[1]	4589164	1			T35	181		T38	804		T39	92763
all_values[11]	auto[1]	auto[0]	auto[1]	68233	1			T38	37		T39	1406		T42	372
all_values[11]	auto[1]	auto[1]	auto[1]	67406	1			T38	46		T39	1299		T42	417
all_values[12]	auto[0]	auto[0]	auto[0]	2535911	1			T35	47		T36	326		T37	185
all_values[12]	auto[0]	auto[0]	auto[1]	4599483	1			T35	116		T38	761		T39	84630
all_values[12]	auto[0]	auto[1]	auto[0]	499970	1			T35	10		T38	162		T39	10193
all_values[12]	auto[0]	auto[1]	auto[1]	4598447	1			T35	146		T38	852		T39	92994
all_values[12]	auto[1]	auto[0]	auto[1]	68211	1			T38	38		T39	1291		T42	367
all_values[12]	auto[1]	auto[1]	auto[1]	67225	1			T38	46		T39	1316		T42	394
all_values[13]	auto[0]	auto[0]	auto[0]	2539974	1			T35	43		T36	326		T37	185
all_values[13]	auto[0]	auto[0]	auto[1]	4573353	1			T35	124		T38	806		T39	87701
all_values[13]	auto[0]	auto[1]	auto[0]	503656	1			T35	51		T38	122		T39	10222
all_values[13]	auto[0]	auto[1]	auto[1]	4616705	1			T35	101		T38	838		T39	90672
all_values[13]	auto[1]	auto[0]	auto[1]	67796	1			T38	37		T39	1358		T42	406
all_values[13]	auto[1]	auto[1]	auto[1]	67763	1			T38	54		T39	1369		T42	398
all_values[14]	auto[0]	auto[0]	auto[0]	2545187	1			T35	26		T36	326		T37	185
all_values[14]	auto[0]	auto[0]	auto[1]	4585997	1			T35	138		T38	798		T39	92842
all_values[14]	auto[0]	auto[1]	auto[0]	498655	1			T35	27		T38	90		T39	9210
all_values[14]	auto[0]	auto[1]	auto[1]	4604109	1			T35	128		T38	910		T39	85570
all_values[14]	auto[1]	auto[0]	auto[1]	67578	1			T38	48		T39	1326		T42	390
all_values[14]	auto[1]	auto[1]	auto[1]	67721	1			T38	43		T39	1314		T42	389
all_values[15]	auto[0]	auto[0]	auto[0]	2535993	1			T35	36		T36	326		T37	185
all_values[15]	auto[0]	auto[0]	auto[1]	4593949	1			T35	138		T38	594		T39	85168
all_values[15]	auto[0]	auto[1]	auto[0]	490037	1			T35	24		T38	211		T39	9588
all_values[15]	auto[0]	auto[1]	auto[1]	4613700	1			T35	121		T38	943		T39	92574
all_values[15]	auto[1]	auto[0]	auto[1]	67789	1			T38	33		T39	1336		T42	373
all_values[15]	auto[1]	auto[1]	auto[1]	67779	1			T38	48		T39	1353		T42	416
all_values[16]	auto[0]	auto[0]	auto[0]	2543115	1			T35	18		T36	326		T37	185
all_values[16]	auto[0]	auto[0]	auto[1]	4584250	1			T35	101		T38	949		T39	91111
all_values[16]	auto[0]	auto[1]	auto[0]	500563	1			T35	30		T38	52		T39	10038
all_values[16]	auto[0]	auto[1]	auto[1]	4605654	1			T35	170		T38	804		T39	86479
all_values[16]	auto[1]	auto[0]	auto[1]	68141	1			T38	41		T39	1387		T42	393
all_values[16]	auto[1]	auto[1]	auto[1]	67524	1			T38	42		T39	1338		T42	375
all_values[17]	auto[0]	auto[0]	auto[0]	2537857	1			T35	48		T36	326		T37	185
all_values[17]	auto[0]	auto[0]	auto[1]	4624208	1			T35	158		T38	842		T39	93429
all_values[17]	auto[0]	auto[1]	auto[0]	493016	1			T35	46		T38	104		T39	8971
all_values[17]	auto[0]	auto[1]	auto[1]	4578363	1			T35	67		T38	798		T39	84662
all_values[17]	auto[1]	auto[0]	auto[1]	68334	1			T38	37		T39	1395		T42	382
all_values[17]	auto[1]	auto[1]	auto[1]	67469	1			T38	37		T39	1274		T42	409
all_values[18]	auto[0]	auto[0]	auto[0]	2537383	1			T35	10		T36	326		T37	185
all_values[18]	auto[0]	auto[0]	auto[1]	4632686	1			T35	180		T38	1086		T39	89548
all_values[18]	auto[0]	auto[1]	auto[0]	495055	1			T35	19		T38	84		T39	9426
all_values[18]	auto[0]	auto[1]	auto[1]	4568544	1			T35	110		T38	580		T39	89111
all_values[18]	auto[1]	auto[0]	auto[1]	68132	1			T38	57		T39	1332		T42	411
all_values[18]	auto[1]	auto[1]	auto[1]	67447	1			T38	31		T39	1368		T42	346
all_values[19]	auto[0]	auto[0]	auto[0]	2543926	1			T35	43		T36	326		T37	185
all_values[19]	auto[0]	auto[0]	auto[1]	4606170	1			T35	131		T38	827		T39	87580
all_values[19]	auto[0]	auto[1]	auto[0]	497434	1			T35	34		T38	107		T39	11157
all_values[19]	auto[0]	auto[1]	auto[1]	4585931	1			T35	111		T38	707		T39	88182
all_values[19]	auto[1]	auto[0]	auto[1]	67726	1			T38	45		T39	1366		T42	352
all_values[19]	auto[1]	auto[1]	auto[1]	68060	1			T38	40		T39	1345		T42	414
all_values[20]	auto[0]	auto[0]	auto[0]	2542897	1			T35	20		T36	326		T37	185
all_values[20]	auto[0]	auto[0]	auto[1]	4605841	1			T35	176		T38	816		T39	89399
all_values[20]	auto[0]	auto[1]	auto[0]	495930	1			T35	21		T38	119		T39	9830
all_values[20]	auto[0]	auto[1]	auto[1]	4588958	1			T35	102		T38	833		T39	88593
all_values[20]	auto[1]	auto[0]	auto[1]	68317	1			T38	40		T39	1336		T42	413
all_values[20]	auto[1]	auto[1]	auto[1]	67304	1			T38	47		T39	1378		T42	399
all_values[21]	auto[0]	auto[0]	auto[0]	2534356	1			T35	27		T36	326		T37	185
all_values[21]	auto[0]	auto[0]	auto[1]	4640790	1			T35	124		T38	752		T39	89559
all_values[21]	auto[0]	auto[1]	auto[0]	495266	1			T35	25		T38	182		T39	8703
all_values[21]	auto[0]	auto[1]	auto[1]	4562944	1			T35	143		T38	747		T39	89322
all_values[21]	auto[1]	auto[0]	auto[1]	68050	1			T38	47		T39	1407		T42	397
all_values[21]	auto[1]	auto[1]	auto[1]	67841	1			T38	31		T39	1331		T42	405
all_values[22]	auto[0]	auto[0]	auto[0]	2534991	1			T35	47		T36	326		T37	185
all_values[22]	auto[0]	auto[0]	auto[1]	4601360	1			T35	75		T38	918		T39	89274
all_values[22]	auto[0]	auto[1]	auto[0]	504444	1			T35	18		T38	68		T39	9404
all_values[22]	auto[0]	auto[1]	auto[1]	4593163	1			T35	179		T38	783		T39	87675
all_values[22]	auto[1]	auto[0]	auto[1]	67581	1			T38	44		T39	1286		T42	434
all_values[22]	auto[1]	auto[1]	auto[1]	67708	1			T38	37		T39	1338		T42	358
all_values[23]	auto[0]	auto[0]	auto[0]	2535762	1			T35	37		T36	326		T37	185
all_values[23]	auto[0]	auto[0]	auto[1]	4596319	1			T35	162		T38	821		T39	83856
all_values[23]	auto[0]	auto[1]	auto[0]	505060	1			T35	27		T38	108		T39	10227
all_values[23]	auto[0]	auto[1]	auto[1]	4596456	1			T35	93		T38	919		T39	92873
all_values[23]	auto[1]	auto[0]	auto[1]	68049	1			T38	35		T39	1304		T42	380
all_values[23]	auto[1]	auto[1]	auto[1]	67601	1			T38	47		T39	1395		T42	438
all_values[24]	auto[0]	auto[0]	auto[0]	2535810	1			T35	38		T36	326		T37	185
all_values[24]	auto[0]	auto[0]	auto[1]	4602358	1			T35	144		T38	798		T39	86828
all_values[24]	auto[0]	auto[1]	auto[0]	508354	1			T35	19		T38	109		T39	9526
all_values[24]	auto[0]	auto[1]	auto[1]	4587120	1			T35	118		T38	893		T39	89960
all_values[24]	auto[1]	auto[0]	auto[1]	67959	1			T38	39		T39	1360		T42	430
all_values[24]	auto[1]	auto[1]	auto[1]	67646	1			T38	45		T39	1388		T42	355
all_values[25]	auto[0]	auto[0]	auto[0]	2533400	1			T35	15		T36	326		T37	185
all_values[25]	auto[0]	auto[0]	auto[1]	4604810	1			T35	104		T38	833		T39	92389
all_values[25]	auto[0]	auto[1]	auto[0]	498321	1			T35	32		T38	112		T39	10201
all_values[25]	auto[0]	auto[1]	auto[1]	4597086	1			T35	168		T38	846		T39	85096
all_values[25]	auto[1]	auto[0]	auto[1]	68411	1			T38	38		T39	1423		T42	376
all_values[25]	auto[1]	auto[1]	auto[1]	67219	1			T38	36		T39	1305		T42	401
all_values[26]	auto[0]	auto[0]	auto[0]	2539531	1			T35	36		T36	326		T37	185
all_values[26]	auto[0]	auto[0]	auto[1]	4589359	1			T35	136		T38	888		T39	87026
all_values[26]	auto[0]	auto[1]	auto[0]	501189	1			T35	28		T38	117		T39	10157
all_values[26]	auto[0]	auto[1]	auto[1]	4603573	1			T35	119		T38	789		T39	88551
all_values[26]	auto[1]	auto[0]	auto[1]	68187	1			T38	40		T39	1338		T42	398
all_values[26]	auto[1]	auto[1]	auto[1]	67408	1			T38	35		T39	1393		T42	347
all_values[27]	auto[0]	auto[0]	auto[0]	2532056	1			T35	36		T36	326		T37	185
all_values[27]	auto[0]	auto[0]	auto[1]	4617296	1			T35	157		T38	958		T39	91665
all_values[27]	auto[0]	auto[1]	auto[0]	509020	1			T35	19		T38	58		T39	10141
all_values[27]	auto[0]	auto[1]	auto[1]	4575227	1			T35	107		T38	736		T39	86131
all_values[27]	auto[1]	auto[0]	auto[1]	68296	1			T38	55		T39	1320		T42	393
all_values[27]	auto[1]	auto[1]	auto[1]	67352	1			T38	30		T39	1351		T42	377
all_values[28]	auto[0]	auto[0]	auto[0]	2534190	1			T35	33		T36	326		T37	185
all_values[28]	auto[0]	auto[0]	auto[1]	4597885	1			T35	124		T38	692		T39	87041
all_values[28]	auto[0]	auto[1]	auto[0]	496024	1			T35	40		T38	142		T39	9315
all_values[28]	auto[0]	auto[1]	auto[1]	4605231	1			T35	122		T38	974		T39	90838
all_values[28]	auto[1]	auto[0]	auto[1]	68418	1			T38	30		T39	1425		T42	425
all_values[28]	auto[1]	auto[1]	auto[1]	67499	1			T38	56		T39	1288		T42	374
all_values[29]	auto[0]	auto[0]	auto[0]	2531438	1			T35	24		T36	326		T37	185
all_values[29]	auto[0]	auto[0]	auto[1]	4634449	1			T35	95		T38	888		T39	84673
all_values[29]	auto[0]	auto[1]	auto[0]	505498	1			T35	33		T38	80		T39	10217
all_values[29]	auto[0]	auto[1]	auto[1]	4562436	1			T35	167		T38	841		T39	92273
all_values[29]	auto[1]	auto[0]	auto[1]	67817	1			T38	39		T39	1292		T42	380
all_values[29]	auto[1]	auto[1]	auto[1]	67609	1			T38	45		T39	1342		T42	407
all_values[30]	auto[0]	auto[0]	auto[0]	2539678	1			T35	24		T36	326		T37	185
all_values[30]	auto[0]	auto[0]	auto[1]	4594095	1			T35	126		T38	800		T39	90937
all_values[30]	auto[0]	auto[1]	auto[0]	507900	1			T35	29		T38	135		T39	9289
all_values[30]	auto[0]	auto[1]	auto[1]	4592015	1			T35	140		T38	904		T39	87239
all_values[30]	auto[1]	auto[0]	auto[1]	68098	1			T38	50		T39	1389		T42	400
all_values[30]	auto[1]	auto[1]	auto[1]	67461	1			T38	40		T39	1305		T42	365
all_values[31]	auto[0]	auto[0]	auto[0]	2544961	1			T35	29		T36	326		T37	185
all_values[31]	auto[0]	auto[0]	auto[1]	4599628	1			T35	82		T38	872		T39	90571
all_values[31]	auto[0]	auto[1]	auto[0]	499539	1			T35	34		T38	145		T39	8895
all_values[31]	auto[0]	auto[1]	auto[1]	4589250	1			T35	174		T38	793		T39	88675
all_values[31]	auto[1]	auto[0]	auto[1]	68026	1			T38	37		T39	1328		T42	432
all_values[31]	auto[1]	auto[1]	auto[1]	67843	1			T38	51		T39	1376		T42	398

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal