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Group Instance : masked_oe_lower_cov_obj_pin21
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin21

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin21
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin22
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin22

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin22
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin23
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin23

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin23
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin24
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin24

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin24
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin25
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin25

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin25
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin26
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin26

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin26
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin27
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin27

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin27
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin28
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin28

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin28
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin29
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin29

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin29
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin30
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin30

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin30
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin31
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin31

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin31
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin4
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin4

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin4
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin5
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin5

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin5
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin6
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin6

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin6
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin7
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin7

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin7
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin8
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin8

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin8
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_lower_cov_obj_pin9
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_lower_cov_obj_pin9

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_lower_cov_obj_pin9
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin10
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin10

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin10
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin11
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin11

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin11
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin12
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin12

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin12
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin13
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin13

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin13
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin14
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin14

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin14
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin15
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin15

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin15
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin16
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin16

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin16
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin17
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin17

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin17
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin18
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin18

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin18
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2


Group Instance : masked_oe_upper_cov_obj_pin19
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_cov_obj_pin19

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00


Variables for Group Instance masked_oe_upper_cov_obj_pin19
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_transitions 2 0 2 100.00 100 1 1 0
cp_value 2 0 2 100.00 100 1 1 2

Go back
Group Instances:
masked_oe_lower_cov_obj_pin21
masked_oe_lower_cov_obj_pin22
masked_oe_lower_cov_obj_pin23
masked_oe_lower_cov_obj_pin24
masked_oe_lower_cov_obj_pin25
masked_oe_lower_cov_obj_pin26
masked_oe_lower_cov_obj_pin27
masked_oe_lower_cov_obj_pin28
masked_oe_lower_cov_obj_pin29
masked_oe_lower_cov_obj_pin3
masked_oe_lower_cov_obj_pin30
masked_oe_lower_cov_obj_pin31
masked_oe_lower_cov_obj_pin4
masked_oe_lower_cov_obj_pin5
masked_oe_lower_cov_obj_pin6
masked_oe_lower_cov_obj_pin7
masked_oe_lower_cov_obj_pin8
masked_oe_lower_cov_obj_pin9
masked_oe_upper_cov_obj_pin0
masked_oe_upper_cov_obj_pin1
masked_oe_upper_cov_obj_pin10
masked_oe_upper_cov_obj_pin11
masked_oe_upper_cov_obj_pin12
masked_oe_upper_cov_obj_pin13
masked_oe_upper_cov_obj_pin14
masked_oe_upper_cov_obj_pin15
masked_oe_upper_cov_obj_pin16
masked_oe_upper_cov_obj_pin17
masked_oe_upper_cov_obj_pin18
masked_oe_upper_cov_obj_pin19

Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89755 1 T37 5 T38 37 T39 1791
rising 89750 1 T37 6 T38 36 T39 1790


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178872 1 T37 12 T38 64 T39 3470
auto[1] 179500 1 T37 11 T38 70 T39 3598


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89336 1 T37 7 T38 28 T39 1766
rising 89347 1 T37 8 T38 27 T39 1767


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179497 1 T37 14 T38 72 T39 3544
auto[1] 178875 1 T37 9 T38 62 T39 3524


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89613 1 T37 6 T38 35 T39 1750
rising 89622 1 T37 6 T38 35 T39 1751


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179268 1 T37 12 T38 70 T39 3509
auto[1] 179104 1 T37 11 T38 64 T39 3559


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89674 1 T37 5 T38 31 T39 1782
rising 89673 1 T37 6 T38 31 T39 1782


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179376 1 T37 13 T38 67 T39 3528
auto[1] 178996 1 T37 10 T38 67 T39 3540


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89428 1 T37 9 T38 36 T39 1776
rising 89407 1 T37 9 T38 35 T39 1776


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178980 1 T37 12 T38 67 T39 3453
auto[1] 179392 1 T37 11 T38 67 T39 3615


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89442 1 T37 4 T38 34 T39 1765
rising 89447 1 T37 5 T38 33 T39 1765


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179115 1 T37 8 T38 59 T39 3541
auto[1] 179257 1 T37 15 T38 75 T39 3527


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89226 1 T37 6 T38 40 T39 1748
rising 89208 1 T37 5 T38 40 T39 1748


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179724 1 T37 15 T38 63 T39 3604
auto[1] 178648 1 T37 8 T38 71 T39 3464


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89580 1 T37 6 T38 33 T39 1799
rising 89593 1 T37 6 T38 32 T39 1800


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179341 1 T37 8 T38 54 T39 3573
auto[1] 179031 1 T37 15 T38 80 T39 3495


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89678 1 T37 6 T38 34 T39 1793
rising 89681 1 T37 6 T38 33 T39 1792


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179458 1 T37 10 T38 66 T39 3487
auto[1] 178914 1 T37 13 T38 68 T39 3581


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89479 1 T37 6 T38 38 T39 1798
rising 89459 1 T37 6 T38 39 T39 1799


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178701 1 T37 10 T38 66 T39 3507
auto[1] 179671 1 T37 13 T38 68 T39 3561


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89316 1 T37 6 T38 35 T39 1785
rising 89288 1 T37 5 T38 34 T39 1785


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178910 1 T37 12 T38 67 T39 3448
auto[1] 179462 1 T37 11 T38 67 T39 3620


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89442 1 T37 5 T38 33 T39 1801
rising 89427 1 T37 4 T38 33 T39 1801


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179437 1 T37 12 T38 75 T39 3607
auto[1] 178935 1 T37 11 T38 59 T39 3461


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89675 1 T37 6 T38 34 T39 1805
rising 89670 1 T37 7 T38 34 T39 1805


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179167 1 T37 11 T38 61 T39 3537
auto[1] 179205 1 T37 12 T38 73 T39 3531


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89461 1 T37 5 T38 33 T39 1770
rising 89469 1 T37 6 T38 33 T39 1770


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179134 1 T37 15 T38 73 T39 3606
auto[1] 179238 1 T37 8 T38 61 T39 3462


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89531 1 T37 7 T38 35 T39 1797
rising 89531 1 T37 6 T38 35 T39 1797


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179214 1 T37 10 T38 61 T39 3549
auto[1] 179158 1 T37 13 T38 73 T39 3519


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89586 1 T37 6 T38 31 T39 1745
rising 89588 1 T37 7 T38 31 T39 1746


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178997 1 T37 13 T38 64 T39 3547
auto[1] 179375 1 T37 10 T38 70 T39 3521


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89495 1 T37 6 T38 32 T39 1758
rising 89506 1 T37 6 T38 31 T39 1758


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179392 1 T37 11 T38 66 T39 3495
auto[1] 178980 1 T37 12 T38 68 T39 3573


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89439 1 T37 7 T38 35 T39 1779
rising 89443 1 T37 8 T38 35 T39 1780


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179755 1 T37 11 T38 62 T39 3579
auto[1] 178617 1 T37 12 T38 72 T39 3489


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89581 1 T37 5 T38 42 T39 1747
rising 89592 1 T37 5 T38 42 T39 1747


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179783 1 T37 12 T38 78 T39 3594
auto[1] 178459 1 T37 9 T38 78 T39 3481


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89643 1 T37 5 T38 44 T39 1773
rising 89639 1 T37 5 T38 43 T39 1774


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179149 1 T37 12 T38 66 T39 3531
auto[1] 179093 1 T37 9 T38 90 T39 3544


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89371 1 T37 5 T38 37 T39 1757
rising 89362 1 T37 5 T38 38 T39 1758


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179169 1 T37 7 T38 80 T39 3512
auto[1] 179073 1 T37 14 T38 76 T39 3563


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89413 1 T37 5 T38 34 T39 1766
rising 89404 1 T37 4 T38 34 T39 1766


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178859 1 T37 10 T38 77 T39 3450
auto[1] 179383 1 T37 11 T38 79 T39 3625


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89384 1 T37 6 T38 31 T39 1771
rising 89364 1 T37 5 T38 31 T39 1772


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179305 1 T37 12 T38 63 T39 3602
auto[1] 178937 1 T37 9 T38 93 T39 3473


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89298 1 T37 7 T38 39 T39 1768
rising 89281 1 T37 7 T38 39 T39 1768


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179164 1 T37 11 T38 70 T39 3534
auto[1] 179078 1 T37 10 T38 86 T39 3541


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89496 1 T37 6 T38 45 T39 1794
rising 89500 1 T37 6 T38 44 T39 1795


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179485 1 T37 9 T38 69 T39 3543
auto[1] 178757 1 T37 12 T38 87 T39 3532


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89388 1 T37 5 T38 38 T39 1774
rising 89395 1 T37 5 T38 38 T39 1774


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179159 1 T37 12 T38 72 T39 3477
auto[1] 179083 1 T37 9 T38 84 T39 3598


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89571 1 T37 5 T38 34 T39 1784
rising 89571 1 T37 6 T38 34 T39 1785


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179096 1 T37 8 T38 81 T39 3520
auto[1] 179146 1 T37 13 T38 75 T39 3555


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89715 1 T37 3 T38 41 T39 1772
rising 89720 1 T37 4 T38 40 T39 1771


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179001 1 T37 9 T38 82 T39 3553
auto[1] 179241 1 T37 12 T38 74 T39 3522


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89454 1 T37 5 T38 37 T39 1779
rising 89437 1 T37 5 T38 38 T39 1780


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179017 1 T37 14 T38 72 T39 3577
auto[1] 179225 1 T37 7 T38 84 T39 3498


Summary for Variable cp_transitions

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for cp_transitions

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
falling 89200 1 T37 6 T38 39 T39 1757
rising 89192 1 T37 7 T38 39 T39 1757


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179469 1 T37 10 T38 70 T39 3529
auto[1] 178773 1 T37 11 T38 86 T39 3546

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%