Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8319855 |
1 |
|
|
T22 |
52 |
|
T23 |
1486 |
|
T24 |
403 |
| auto[1] |
6311871 |
1 |
|
|
T22 |
24 |
|
T23 |
1237 |
|
T29 |
268 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13830211 |
1 |
|
|
T22 |
76 |
|
T23 |
2433 |
|
T24 |
403 |
| auto[1] |
801515 |
1 |
|
|
T23 |
290 |
|
T29 |
9 |
|
T30 |
4 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8327445 |
1 |
|
|
T22 |
57 |
|
T23 |
1226 |
|
T24 |
403 |
| auto[1] |
6304281 |
1 |
|
|
T22 |
19 |
|
T23 |
1497 |
|
T29 |
143 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2756290 |
1 |
|
|
T22 |
10 |
|
T23 |
617 |
|
T29 |
38 |
| auto[1] |
auto[0] |
auto[1] |
402552 |
1 |
|
|
T23 |
156 |
|
T29 |
2 |
|
T30 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2746476 |
1 |
|
|
T22 |
9 |
|
T23 |
590 |
|
T29 |
96 |
| auto[1] |
auto[1] |
auto[1] |
398963 |
1 |
|
|
T23 |
134 |
|
T29 |
7 |
|
T30 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |