Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8328238 |
1 |
|
|
T22 |
53 |
|
T23 |
1316 |
|
T24 |
403 |
| auto[1] |
6303488 |
1 |
|
|
T22 |
23 |
|
T23 |
1407 |
|
T29 |
255 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13825814 |
1 |
|
|
T22 |
76 |
|
T23 |
2454 |
|
T24 |
403 |
| auto[1] |
805912 |
1 |
|
|
T23 |
269 |
|
T29 |
6 |
|
T30 |
1 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8306622 |
1 |
|
|
T22 |
69 |
|
T23 |
1334 |
|
T24 |
403 |
| auto[1] |
6325104 |
1 |
|
|
T22 |
7 |
|
T23 |
1389 |
|
T29 |
162 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2759701 |
1 |
|
|
T22 |
6 |
|
T23 |
587 |
|
T29 |
68 |
| auto[1] |
auto[0] |
auto[1] |
403909 |
1 |
|
|
T23 |
141 |
|
T29 |
1 |
|
T30 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2759491 |
1 |
|
|
T22 |
1 |
|
T23 |
533 |
|
T29 |
88 |
| auto[1] |
auto[1] |
auto[1] |
402003 |
1 |
|
|
T23 |
128 |
|
T29 |
5 |
|
T1 |
3 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |