Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8326407 |
1 |
|
|
T22 |
59 |
|
T23 |
1177 |
|
T24 |
403 |
| auto[1] |
6305319 |
1 |
|
|
T22 |
17 |
|
T23 |
1546 |
|
T29 |
179 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13827724 |
1 |
|
|
T22 |
75 |
|
T23 |
2438 |
|
T24 |
403 |
| auto[1] |
804002 |
1 |
|
|
T22 |
1 |
|
T23 |
285 |
|
T29 |
12 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8314953 |
1 |
|
|
T22 |
55 |
|
T23 |
1189 |
|
T24 |
403 |
| auto[1] |
6316773 |
1 |
|
|
T22 |
21 |
|
T23 |
1534 |
|
T29 |
201 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2764224 |
1 |
|
|
T22 |
9 |
|
T23 |
556 |
|
T29 |
89 |
| auto[1] |
auto[0] |
auto[1] |
402782 |
1 |
|
|
T22 |
1 |
|
T23 |
132 |
|
T29 |
7 |
| auto[1] |
auto[1] |
auto[0] |
2748547 |
1 |
|
|
T22 |
11 |
|
T23 |
693 |
|
T29 |
100 |
| auto[1] |
auto[1] |
auto[1] |
401220 |
1 |
|
|
T23 |
153 |
|
T29 |
5 |
|
T30 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |