Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8323130 |
1 |
|
|
T22 |
41 |
|
T23 |
1469 |
|
T24 |
403 |
| auto[1] |
6308596 |
1 |
|
|
T22 |
35 |
|
T23 |
1254 |
|
T29 |
188 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12053591 |
1 |
|
|
T22 |
73 |
|
T23 |
2045 |
|
T24 |
403 |
| auto[1] |
2578135 |
1 |
|
|
T22 |
3 |
|
T23 |
678 |
|
T29 |
82 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8256061 |
1 |
|
|
T22 |
59 |
|
T23 |
1327 |
|
T24 |
403 |
| auto[1] |
6375665 |
1 |
|
|
T22 |
17 |
|
T23 |
1396 |
|
T29 |
175 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1904436 |
1 |
|
|
T22 |
7 |
|
T23 |
411 |
|
T29 |
49 |
| auto[1] |
auto[0] |
auto[1] |
1296262 |
1 |
|
|
T23 |
393 |
|
T29 |
44 |
|
T30 |
12 |
| auto[1] |
auto[1] |
auto[0] |
1893094 |
1 |
|
|
T22 |
7 |
|
T23 |
307 |
|
T29 |
44 |
| auto[1] |
auto[1] |
auto[1] |
1281873 |
1 |
|
|
T22 |
3 |
|
T23 |
285 |
|
T29 |
38 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |