Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8341686 |
1 |
|
|
T22 |
53 |
|
T23 |
1260 |
|
T24 |
403 |
| auto[1] |
6290040 |
1 |
|
|
T22 |
23 |
|
T23 |
1463 |
|
T29 |
184 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12082214 |
1 |
|
|
T22 |
65 |
|
T23 |
2257 |
|
T24 |
403 |
| auto[1] |
2549512 |
1 |
|
|
T22 |
11 |
|
T23 |
466 |
|
T29 |
103 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8327430 |
1 |
|
|
T22 |
60 |
|
T23 |
1792 |
|
T24 |
403 |
| auto[1] |
6304296 |
1 |
|
|
T22 |
16 |
|
T23 |
931 |
|
T29 |
195 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1886896 |
1 |
|
|
T22 |
2 |
|
T23 |
239 |
|
T29 |
51 |
| auto[1] |
auto[0] |
auto[1] |
1283945 |
1 |
|
|
T22 |
9 |
|
T23 |
247 |
|
T29 |
62 |
| auto[1] |
auto[1] |
auto[0] |
1867888 |
1 |
|
|
T22 |
3 |
|
T23 |
226 |
|
T29 |
41 |
| auto[1] |
auto[1] |
auto[1] |
1265567 |
1 |
|
|
T22 |
2 |
|
T23 |
219 |
|
T29 |
41 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |