Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8304408 |
1 |
|
|
T22 |
61 |
|
T23 |
1331 |
|
T24 |
403 |
| auto[1] |
6327318 |
1 |
|
|
T22 |
15 |
|
T23 |
1392 |
|
T29 |
171 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12064891 |
1 |
|
|
T22 |
68 |
|
T23 |
2170 |
|
T24 |
403 |
| auto[1] |
2566835 |
1 |
|
|
T22 |
8 |
|
T23 |
553 |
|
T29 |
142 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8295426 |
1 |
|
|
T22 |
68 |
|
T23 |
1580 |
|
T24 |
403 |
| auto[1] |
6336300 |
1 |
|
|
T22 |
8 |
|
T23 |
1143 |
|
T29 |
215 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1880677 |
1 |
|
|
T23 |
334 |
|
T29 |
47 |
|
T30 |
4 |
| auto[1] |
auto[0] |
auto[1] |
1280569 |
1 |
|
|
T22 |
3 |
|
T23 |
315 |
|
T29 |
81 |
| auto[1] |
auto[1] |
auto[0] |
1888788 |
1 |
|
|
T23 |
256 |
|
T29 |
26 |
|
T30 |
2 |
| auto[1] |
auto[1] |
auto[1] |
1286266 |
1 |
|
|
T22 |
5 |
|
T23 |
238 |
|
T29 |
61 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |