Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8299561 |
1 |
|
|
T22 |
49 |
|
T23 |
1150 |
|
T24 |
403 |
| auto[1] |
6332165 |
1 |
|
|
T22 |
27 |
|
T23 |
1573 |
|
T29 |
235 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12085344 |
1 |
|
|
T22 |
73 |
|
T23 |
1824 |
|
T24 |
403 |
| auto[1] |
2546382 |
1 |
|
|
T22 |
3 |
|
T23 |
899 |
|
T29 |
154 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8338988 |
1 |
|
|
T22 |
69 |
|
T23 |
988 |
|
T24 |
403 |
| auto[1] |
6292738 |
1 |
|
|
T22 |
7 |
|
T23 |
1735 |
|
T29 |
208 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1871108 |
1 |
|
|
T22 |
2 |
|
T23 |
303 |
|
T29 |
21 |
| auto[1] |
auto[0] |
auto[1] |
1270449 |
1 |
|
|
T23 |
369 |
|
T29 |
70 |
|
T30 |
13 |
| auto[1] |
auto[1] |
auto[0] |
1875248 |
1 |
|
|
T22 |
2 |
|
T23 |
533 |
|
T29 |
33 |
| auto[1] |
auto[1] |
auto[1] |
1275933 |
1 |
|
|
T22 |
3 |
|
T23 |
530 |
|
T29 |
84 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |