Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8317357 |
1 |
|
|
T22 |
60 |
|
T23 |
1178 |
|
T24 |
403 |
| auto[1] |
6314369 |
1 |
|
|
T22 |
16 |
|
T23 |
1545 |
|
T29 |
196 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12072554 |
1 |
|
|
T22 |
70 |
|
T23 |
2003 |
|
T24 |
403 |
| auto[1] |
2559172 |
1 |
|
|
T22 |
6 |
|
T23 |
720 |
|
T29 |
81 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8303799 |
1 |
|
|
T22 |
61 |
|
T23 |
1284 |
|
T24 |
403 |
| auto[1] |
6327927 |
1 |
|
|
T22 |
15 |
|
T23 |
1439 |
|
T29 |
214 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1892962 |
1 |
|
|
T22 |
8 |
|
T23 |
356 |
|
T29 |
77 |
| auto[1] |
auto[0] |
auto[1] |
1278079 |
1 |
|
|
T22 |
6 |
|
T23 |
317 |
|
T29 |
47 |
| auto[1] |
auto[1] |
auto[0] |
1875793 |
1 |
|
|
T22 |
1 |
|
T23 |
363 |
|
T29 |
56 |
| auto[1] |
auto[1] |
auto[1] |
1281093 |
1 |
|
|
T23 |
403 |
|
T29 |
34 |
|
T30 |
16 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |