Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8269656 |
1 |
|
|
T22 |
53 |
|
T23 |
1278 |
|
T24 |
403 |
auto[1] |
6362070 |
1 |
|
|
T22 |
23 |
|
T23 |
1445 |
|
T29 |
211 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12070208 |
1 |
|
|
T22 |
72 |
|
T23 |
2131 |
|
T24 |
403 |
auto[1] |
2561518 |
1 |
|
|
T22 |
4 |
|
T23 |
592 |
|
T29 |
99 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8286941 |
1 |
|
|
T22 |
65 |
|
T23 |
1561 |
|
T24 |
403 |
auto[1] |
6344785 |
1 |
|
|
T22 |
11 |
|
T23 |
1162 |
|
T29 |
207 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1888032 |
1 |
|
|
T22 |
4 |
|
T23 |
268 |
|
T29 |
46 |
auto[1] |
auto[0] |
auto[1] |
1275763 |
1 |
|
|
T22 |
4 |
|
T23 |
290 |
|
T29 |
38 |
auto[1] |
auto[1] |
auto[0] |
1895235 |
1 |
|
|
T22 |
3 |
|
T23 |
302 |
|
T29 |
62 |
auto[1] |
auto[1] |
auto[1] |
1285755 |
1 |
|
|
T23 |
302 |
|
T29 |
61 |
|
T30 |
8 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |