Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8325624 |
1 |
|
|
T22 |
40 |
|
T23 |
1274 |
|
T24 |
403 |
| auto[1] |
6306102 |
1 |
|
|
T22 |
36 |
|
T23 |
1449 |
|
T29 |
150 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12076384 |
1 |
|
|
T22 |
69 |
|
T23 |
1929 |
|
T24 |
403 |
| auto[1] |
2555342 |
1 |
|
|
T22 |
7 |
|
T23 |
794 |
|
T29 |
91 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8308401 |
1 |
|
|
T22 |
68 |
|
T23 |
1247 |
|
T24 |
403 |
| auto[1] |
6323325 |
1 |
|
|
T22 |
8 |
|
T23 |
1476 |
|
T29 |
223 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1885763 |
1 |
|
|
T23 |
308 |
|
T29 |
88 |
|
T30 |
12 |
| auto[1] |
auto[0] |
auto[1] |
1282002 |
1 |
|
|
T22 |
3 |
|
T23 |
362 |
|
T29 |
61 |
| auto[1] |
auto[1] |
auto[0] |
1882220 |
1 |
|
|
T22 |
1 |
|
T23 |
374 |
|
T29 |
44 |
| auto[1] |
auto[1] |
auto[1] |
1273340 |
1 |
|
|
T22 |
4 |
|
T23 |
432 |
|
T29 |
30 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |