Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8294904 |
1 |
|
|
T22 |
52 |
|
T23 |
1556 |
|
T24 |
403 |
| auto[1] |
6336822 |
1 |
|
|
T22 |
24 |
|
T23 |
1167 |
|
T29 |
158 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12070375 |
1 |
|
|
T22 |
68 |
|
T23 |
1934 |
|
T24 |
403 |
| auto[1] |
2561351 |
1 |
|
|
T22 |
8 |
|
T23 |
789 |
|
T29 |
130 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8300654 |
1 |
|
|
T22 |
58 |
|
T23 |
1178 |
|
T24 |
403 |
| auto[1] |
6331072 |
1 |
|
|
T22 |
18 |
|
T23 |
1545 |
|
T29 |
200 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1875533 |
1 |
|
|
T22 |
7 |
|
T23 |
462 |
|
T29 |
44 |
| auto[1] |
auto[0] |
auto[1] |
1274420 |
1 |
|
|
T22 |
8 |
|
T23 |
447 |
|
T29 |
70 |
| auto[1] |
auto[1] |
auto[0] |
1894188 |
1 |
|
|
T22 |
3 |
|
T23 |
294 |
|
T29 |
26 |
| auto[1] |
auto[1] |
auto[1] |
1286931 |
1 |
|
|
T23 |
342 |
|
T29 |
60 |
|
T30 |
12 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |