Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8326742 |
1 |
|
|
T22 |
62 |
|
T23 |
1377 |
|
T24 |
403 |
| auto[1] |
6304984 |
1 |
|
|
T22 |
14 |
|
T23 |
1346 |
|
T29 |
143 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13824885 |
1 |
|
|
T22 |
76 |
|
T23 |
2512 |
|
T24 |
403 |
| auto[1] |
806841 |
1 |
|
|
T23 |
211 |
|
T29 |
6 |
|
T30 |
2 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8287007 |
1 |
|
|
T22 |
60 |
|
T23 |
1595 |
|
T24 |
403 |
| auto[1] |
6344719 |
1 |
|
|
T22 |
16 |
|
T23 |
1128 |
|
T29 |
170 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2781708 |
1 |
|
|
T22 |
16 |
|
T23 |
450 |
|
T29 |
114 |
| auto[1] |
auto[0] |
auto[1] |
405601 |
1 |
|
|
T23 |
97 |
|
T29 |
2 |
|
T32 |
1 |
| auto[1] |
auto[1] |
auto[0] |
2756170 |
1 |
|
|
T23 |
467 |
|
T29 |
50 |
|
T30 |
20 |
| auto[1] |
auto[1] |
auto[1] |
401240 |
1 |
|
|
T23 |
114 |
|
T29 |
4 |
|
T30 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |