Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8315939 |
1 |
|
|
T22 |
61 |
|
T23 |
1466 |
|
T24 |
403 |
| auto[1] |
6315787 |
1 |
|
|
T22 |
15 |
|
T23 |
1257 |
|
T29 |
161 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13832220 |
1 |
|
|
T22 |
75 |
|
T23 |
2458 |
|
T24 |
403 |
| auto[1] |
799506 |
1 |
|
|
T22 |
1 |
|
T23 |
265 |
|
T29 |
10 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8330923 |
1 |
|
|
T22 |
61 |
|
T23 |
1279 |
|
T24 |
403 |
| auto[1] |
6300803 |
1 |
|
|
T22 |
15 |
|
T23 |
1444 |
|
T29 |
171 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2760160 |
1 |
|
|
T22 |
11 |
|
T23 |
702 |
|
T29 |
93 |
| auto[1] |
auto[0] |
auto[1] |
399672 |
1 |
|
|
T22 |
1 |
|
T23 |
152 |
|
T29 |
5 |
| auto[1] |
auto[1] |
auto[0] |
2741137 |
1 |
|
|
T22 |
3 |
|
T23 |
477 |
|
T29 |
68 |
| auto[1] |
auto[1] |
auto[1] |
399834 |
1 |
|
|
T23 |
113 |
|
T29 |
5 |
|
T30 |
1 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |