Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3501626 |
1 |
|
|
T22 |
5 |
|
T23 |
17923 |
|
T24 |
25 |
| auto[1] |
auto[0] |
auto[1] |
513660 |
1 |
|
|
T23 |
2853 |
|
T24 |
2 |
|
T26 |
101 |
| auto[1] |
auto[1] |
auto[0] |
3456895 |
1 |
|
|
T22 |
3 |
|
T23 |
18460 |
|
T24 |
12 |
| auto[1] |
auto[1] |
auto[1] |
505925 |
1 |
|
|
T23 |
2907 |
|
T24 |
1 |
|
T26 |
98 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |