Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10048838 |
1 |
|
|
T22 |
39 |
|
T23 |
52797 |
|
T24 |
73 |
| auto[1] |
7998537 |
1 |
|
|
T22 |
11 |
|
T23 |
46516 |
|
T24 |
73 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14781224 |
1 |
|
|
T22 |
44 |
|
T23 |
81254 |
|
T24 |
132 |
| auto[1] |
3266151 |
1 |
|
|
T22 |
6 |
|
T23 |
18059 |
|
T24 |
14 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10064274 |
1 |
|
|
T22 |
43 |
|
T23 |
55566 |
|
T24 |
102 |
| auto[1] |
7983101 |
1 |
|
|
T22 |
7 |
|
T23 |
43747 |
|
T24 |
44 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2368457 |
1 |
|
|
T22 |
1 |
|
T23 |
12593 |
|
T24 |
25 |
| auto[1] |
auto[0] |
auto[1] |
1637045 |
1 |
|
|
T22 |
3 |
|
T23 |
8810 |
|
T24 |
14 |
| auto[1] |
auto[1] |
auto[0] |
2348493 |
1 |
|
|
T23 |
13095 |
|
T24 |
5 |
|
T26 |
227 |
| auto[1] |
auto[1] |
auto[1] |
1629106 |
1 |
|
|
T22 |
3 |
|
T23 |
9249 |
|
T26 |
199 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |