cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55596 |
1 |
|
|
T100 |
703 |
|
T101 |
165 |
|
T102 |
969 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42001 |
1 |
|
|
T100 |
506 |
|
T101 |
397 |
|
T103 |
1506 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56802 |
1 |
|
|
T100 |
399 |
|
T101 |
1546 |
|
T102 |
447 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40378 |
1 |
|
|
T100 |
1382 |
|
T101 |
478 |
|
T102 |
17 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T100 |
24 |
|
T101 |
20 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T100 |
26 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T100 |
24 |
|
T101 |
20 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T100 |
26 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
26 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T100 |
24 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T100 |
23 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T100 |
23 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
22 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T100 |
19 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
9 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T100 |
18 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T100 |
18 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T103 |
54 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1105 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T103 |
51 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
8 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1090 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54724 |
1 |
|
|
T100 |
608 |
|
T101 |
1744 |
|
T102 |
189 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49532 |
1 |
|
|
T100 |
1239 |
|
T101 |
367 |
|
T102 |
880 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52898 |
1 |
|
|
T100 |
635 |
|
T101 |
316 |
|
T102 |
167 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
36726 |
1 |
|
|
T100 |
450 |
|
T101 |
195 |
|
T102 |
87 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T100 |
25 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T100 |
25 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T100 |
24 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T100 |
24 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1300 |
1 |
|
|
T100 |
24 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T100 |
22 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T100 |
22 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T100 |
21 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T100 |
21 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T100 |
20 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T100 |
18 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1103 |
1 |
|
|
T100 |
19 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54223 |
1 |
|
|
T100 |
1268 |
|
T101 |
229 |
|
T102 |
176 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48576 |
1 |
|
|
T100 |
639 |
|
T101 |
543 |
|
T102 |
979 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48952 |
1 |
|
|
T100 |
379 |
|
T101 |
342 |
|
T102 |
99 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41770 |
1 |
|
|
T100 |
490 |
|
T101 |
1574 |
|
T102 |
125 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
3 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T100 |
33 |
|
T101 |
21 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
8 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T100 |
35 |
|
T101 |
19 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
3 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T100 |
32 |
|
T101 |
21 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
8 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T100 |
32 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T100 |
32 |
|
T101 |
21 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T100 |
32 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T100 |
31 |
|
T101 |
21 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T100 |
32 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T100 |
31 |
|
T101 |
20 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T100 |
31 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T100 |
31 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
30 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T100 |
31 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T100 |
29 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
636 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T100 |
31 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T100 |
29 |
|
T101 |
18 |
|
T102 |
6 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T100 |
30 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
5 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T100 |
28 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T100 |
28 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T100 |
26 |
|
T101 |
17 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T100 |
26 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T100 |
25 |
|
T101 |
17 |
|
T102 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T100 |
26 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T100 |
26 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T100 |
10 |
|
T101 |
2 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T100 |
26 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
2 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49713 |
1 |
|
|
T100 |
648 |
|
T101 |
400 |
|
T102 |
411 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50115 |
1 |
|
|
T100 |
502 |
|
T101 |
1536 |
|
T102 |
2 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57239 |
1 |
|
|
T100 |
853 |
|
T101 |
416 |
|
T102 |
898 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37694 |
1 |
|
|
T100 |
1088 |
|
T101 |
222 |
|
T102 |
76 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
19 |
|
T101 |
20 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T100 |
19 |
|
T101 |
19 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T100 |
18 |
|
T101 |
20 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T100 |
19 |
|
T101 |
19 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T100 |
18 |
|
T101 |
20 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T100 |
18 |
|
T101 |
20 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T100 |
18 |
|
T101 |
18 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T100 |
17 |
|
T101 |
20 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T100 |
16 |
|
T101 |
18 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T100 |
17 |
|
T101 |
20 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T100 |
15 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T100 |
16 |
|
T101 |
16 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T100 |
15 |
|
T101 |
19 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T100 |
15 |
|
T101 |
16 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T100 |
14 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T100 |
14 |
|
T101 |
18 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T100 |
15 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T100 |
14 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T100 |
14 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1106 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T100 |
13 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1071 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T100 |
13 |
|
T101 |
15 |
|
T102 |
1 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1037 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51199 |
1 |
|
|
T100 |
1268 |
|
T101 |
487 |
|
T102 |
210 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48137 |
1 |
|
|
T100 |
666 |
|
T101 |
459 |
|
T102 |
87 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53173 |
1 |
|
|
T100 |
553 |
|
T101 |
250 |
|
T102 |
936 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42176 |
1 |
|
|
T100 |
564 |
|
T101 |
1477 |
|
T102 |
106 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T100 |
24 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T100 |
27 |
|
T101 |
21 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T100 |
24 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
26 |
|
T101 |
20 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T100 |
24 |
|
T101 |
19 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T100 |
23 |
|
T101 |
19 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T102 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
623 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
622 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
621 |
1 |
|
|
T100 |
6 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1127 |
1 |
|
|
T100 |
19 |
|
T101 |
15 |
|
T102 |
5 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49108 |
1 |
|
|
T100 |
537 |
|
T101 |
244 |
|
T102 |
2 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50257 |
1 |
|
|
T100 |
1159 |
|
T101 |
1761 |
|
T102 |
965 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53200 |
1 |
|
|
T100 |
726 |
|
T101 |
179 |
|
T102 |
112 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41702 |
1 |
|
|
T100 |
506 |
|
T101 |
521 |
|
T102 |
167 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T100 |
28 |
|
T101 |
18 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T100 |
25 |
|
T101 |
20 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T100 |
28 |
|
T101 |
18 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
630 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T100 |
24 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T100 |
23 |
|
T101 |
20 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T100 |
26 |
|
T101 |
16 |
|
T102 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
629 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T100 |
23 |
|
T101 |
19 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T100 |
23 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
620 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T100 |
22 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T100 |
22 |
|
T101 |
12 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
14 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T100 |
19 |
|
T101 |
18 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T100 |
19 |
|
T101 |
18 |
|
T102 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T103 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
615 |
1 |
|
|
T100 |
12 |
|
T101 |
2 |
|
T102 |
1 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1147 |
1 |
|
|
T100 |
19 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56125 |
1 |
|
|
T100 |
552 |
|
T101 |
390 |
|
T102 |
823 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43074 |
1 |
|
|
T100 |
520 |
|
T101 |
1459 |
|
T102 |
105 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56610 |
1 |
|
|
T100 |
1257 |
|
T101 |
416 |
|
T102 |
183 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37959 |
1 |
|
|
T100 |
574 |
|
T101 |
389 |
|
T102 |
224 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T100 |
30 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T100 |
29 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T100 |
27 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T100 |
29 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T100 |
28 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
6 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
5 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T100 |
25 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T100 |
25 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T100 |
25 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T100 |
25 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T100 |
18 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T100 |
24 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T100 |
17 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54088 |
1 |
|
|
T100 |
723 |
|
T101 |
436 |
|
T102 |
213 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47690 |
1 |
|
|
T100 |
580 |
|
T101 |
261 |
|
T102 |
118 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52488 |
1 |
|
|
T100 |
576 |
|
T101 |
1752 |
|
T102 |
190 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41389 |
1 |
|
|
T100 |
1204 |
|
T101 |
231 |
|
T102 |
826 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T100 |
21 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T100 |
18 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T100 |
18 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T100 |
16 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T100 |
16 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T100 |
16 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1161 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T100 |
15 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1128 |
1 |
|
|
T100 |
16 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T100 |
15 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T100 |
16 |
|
T101 |
9 |
|
T102 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1076 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52779 |
1 |
|
|
T100 |
1394 |
|
T101 |
1597 |
|
T102 |
831 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41311 |
1 |
|
|
T100 |
556 |
|
T101 |
360 |
|
T102 |
308 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53476 |
1 |
|
|
T100 |
495 |
|
T101 |
357 |
|
T102 |
26 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46264 |
1 |
|
|
T100 |
516 |
|
T101 |
390 |
|
T102 |
188 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T100 |
27 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T100 |
27 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
26 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T100 |
26 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T100 |
23 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T100 |
26 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T100 |
22 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T100 |
26 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T100 |
21 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T100 |
26 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T100 |
21 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T100 |
26 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T100 |
26 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T100 |
26 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1174 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
9 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T100 |
23 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57774 |
1 |
|
|
T100 |
262 |
|
T101 |
1840 |
|
T102 |
1022 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39073 |
1 |
|
|
T100 |
1337 |
|
T101 |
249 |
|
T102 |
147 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53063 |
1 |
|
|
T100 |
589 |
|
T101 |
372 |
|
T102 |
263 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44503 |
1 |
|
|
T100 |
773 |
|
T101 |
234 |
|
T102 |
65 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T100 |
31 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T100 |
31 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T100 |
31 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T100 |
31 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T100 |
27 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T100 |
30 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T100 |
29 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T100 |
24 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T100 |
24 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T100 |
24 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T100 |
26 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T100 |
23 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T100 |
23 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T100 |
23 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T100 |
23 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
4 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
7 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1097 |
1 |
|
|
T100 |
22 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55976 |
1 |
|
|
T100 |
1262 |
|
T101 |
260 |
|
T102 |
86 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46344 |
1 |
|
|
T100 |
531 |
|
T101 |
1401 |
|
T102 |
970 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48807 |
1 |
|
|
T100 |
569 |
|
T101 |
659 |
|
T102 |
28 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42493 |
1 |
|
|
T100 |
534 |
|
T101 |
340 |
|
T102 |
265 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T100 |
27 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T100 |
27 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T100 |
22 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
12 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
9 |
|
T101 |
8 |
|
T103 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
10 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
641 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
1 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50651 |
1 |
|
|
T100 |
523 |
|
T101 |
342 |
|
T102 |
207 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42625 |
1 |
|
|
T100 |
1296 |
|
T101 |
364 |
|
T102 |
64 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58790 |
1 |
|
|
T100 |
706 |
|
T101 |
242 |
|
T102 |
457 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42887 |
1 |
|
|
T100 |
514 |
|
T101 |
1639 |
|
T102 |
738 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T100 |
27 |
|
T101 |
19 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T100 |
26 |
|
T101 |
23 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T100 |
26 |
|
T101 |
19 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T100 |
25 |
|
T101 |
23 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T100 |
25 |
|
T101 |
19 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T100 |
25 |
|
T101 |
23 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T100 |
25 |
|
T101 |
23 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
25 |
|
T101 |
23 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
634 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
7 |
|
T101 |
4 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T100 |
24 |
|
T101 |
22 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
626 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T100 |
23 |
|
T101 |
22 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T100 |
22 |
|
T101 |
22 |
|
T102 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T100 |
22 |
|
T101 |
21 |
|
T102 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
635 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T100 |
22 |
|
T101 |
21 |
|
T102 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T100 |
22 |
|
T101 |
21 |
|
T102 |
1 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T100 |
16 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T100 |
21 |
|
T101 |
21 |
|
T102 |
1 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
619 |
1 |
|
|
T100 |
6 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T100 |
7 |
|
T101 |
3 |
|
T102 |
3 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T100 |
21 |
|
T101 |
21 |
|
T102 |
1 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57617 |
1 |
|
|
T100 |
1522 |
|
T101 |
363 |
|
T102 |
1030 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40239 |
1 |
|
|
T100 |
186 |
|
T101 |
178 |
|
T102 |
68 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54929 |
1 |
|
|
T100 |
954 |
|
T101 |
1887 |
|
T102 |
355 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42393 |
1 |
|
|
T100 |
386 |
|
T101 |
273 |
|
T102 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T100 |
18 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T100 |
15 |
|
T101 |
15 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T100 |
18 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T100 |
17 |
|
T101 |
17 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T100 |
16 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T100 |
15 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T100 |
14 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T100 |
14 |
|
T101 |
16 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T100 |
12 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T100 |
12 |
|
T101 |
13 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T100 |
11 |
|
T101 |
13 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1157 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T100 |
9 |
|
T101 |
12 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1126 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
5 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T100 |
7 |
|
T101 |
9 |
|
T102 |
1 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
1 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56415 |
1 |
|
|
T100 |
1611 |
|
T101 |
672 |
|
T102 |
71 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38689 |
1 |
|
|
T100 |
296 |
|
T101 |
80 |
|
T102 |
980 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58054 |
1 |
|
|
T100 |
879 |
|
T101 |
1846 |
|
T102 |
137 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42684 |
1 |
|
|
T100 |
368 |
|
T101 |
208 |
|
T102 |
115 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T100 |
12 |
|
T101 |
5 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T100 |
12 |
|
T101 |
5 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T100 |
12 |
|
T101 |
4 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T100 |
11 |
|
T101 |
4 |
|
T102 |
12 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T100 |
9 |
|
T101 |
3 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T100 |
9 |
|
T101 |
3 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T100 |
9 |
|
T101 |
2 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1099 |
1 |
|
|
T100 |
9 |
|
T101 |
2 |
|
T102 |
11 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1089 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51116 |
1 |
|
|
T100 |
734 |
|
T101 |
1494 |
|
T102 |
298 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48598 |
1 |
|
|
T100 |
1327 |
|
T101 |
346 |
|
T102 |
90 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49129 |
1 |
|
|
T100 |
349 |
|
T101 |
392 |
|
T102 |
227 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44981 |
1 |
|
|
T100 |
535 |
|
T101 |
449 |
|
T102 |
782 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T100 |
28 |
|
T101 |
15 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
6 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
7 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
26 |
|
T101 |
15 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T100 |
25 |
|
T101 |
16 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T100 |
25 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T100 |
24 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T100 |
24 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T100 |
22 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T100 |
22 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T100 |
22 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1118 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1153 |
1 |
|
|
T100 |
22 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54799 |
1 |
|
|
T100 |
567 |
|
T101 |
1766 |
|
T102 |
291 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42687 |
1 |
|
|
T100 |
465 |
|
T101 |
215 |
|
T103 |
888 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56728 |
1 |
|
|
T100 |
1357 |
|
T101 |
447 |
|
T102 |
1155 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41253 |
1 |
|
|
T100 |
578 |
|
T101 |
292 |
|
T103 |
2254 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T100 |
23 |
|
T101 |
10 |
|
T103 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T103 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T100 |
23 |
|
T101 |
10 |
|
T103 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T103 |
50 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T100 |
23 |
|
T101 |
9 |
|
T103 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T103 |
49 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T100 |
23 |
|
T101 |
8 |
|
T103 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T103 |
48 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T100 |
23 |
|
T101 |
8 |
|
T103 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T103 |
47 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T100 |
22 |
|
T101 |
8 |
|
T103 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T103 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T100 |
21 |
|
T101 |
8 |
|
T103 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T100 |
21 |
|
T101 |
8 |
|
T103 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T100 |
20 |
|
T101 |
7 |
|
T103 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
45 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T100 |
19 |
|
T101 |
7 |
|
T103 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
44 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T103 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1203 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T103 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1130 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T103 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T103 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1115 |
1 |
|
|
T100 |
16 |
|
T101 |
7 |
|
T103 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1133 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T103 |
43 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1087 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T103 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
12 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T103 |
42 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54473 |
1 |
|
|
T100 |
669 |
|
T101 |
148 |
|
T102 |
1119 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42742 |
1 |
|
|
T100 |
431 |
|
T101 |
1493 |
|
T102 |
140 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52809 |
1 |
|
|
T100 |
861 |
|
T101 |
624 |
|
T102 |
196 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45286 |
1 |
|
|
T100 |
1072 |
|
T101 |
376 |
|
T103 |
1257 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T100 |
19 |
|
T101 |
22 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T100 |
16 |
|
T101 |
19 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
5 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T100 |
19 |
|
T101 |
22 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T100 |
16 |
|
T101 |
19 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T100 |
19 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T100 |
15 |
|
T101 |
18 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T100 |
18 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
14 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T100 |
18 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T100 |
14 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T100 |
18 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T100 |
14 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T100 |
18 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T100 |
14 |
|
T101 |
15 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T100 |
18 |
|
T101 |
21 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T100 |
13 |
|
T101 |
14 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T100 |
18 |
|
T101 |
20 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T100 |
12 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
635 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T100 |
18 |
|
T101 |
19 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T100 |
12 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T100 |
17 |
|
T101 |
18 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T100 |
11 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
633 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T100 |
17 |
|
T101 |
18 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T100 |
10 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T100 |
16 |
|
T101 |
17 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T100 |
10 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T100 |
16 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T100 |
10 |
|
T101 |
13 |
|
T102 |
1 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T100 |
12 |
|
T101 |
3 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1125 |
1 |
|
|
T100 |
16 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1087 |
1 |
|
|
T100 |
9 |
|
T101 |
13 |
|
T103 |
35 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59312 |
1 |
|
|
T100 |
442 |
|
T101 |
1613 |
|
T102 |
205 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40490 |
1 |
|
|
T100 |
490 |
|
T101 |
252 |
|
T102 |
76 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56302 |
1 |
|
|
T100 |
1500 |
|
T101 |
412 |
|
T102 |
183 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
37595 |
1 |
|
|
T100 |
607 |
|
T101 |
278 |
|
T102 |
915 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T100 |
25 |
|
T101 |
22 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T100 |
23 |
|
T101 |
21 |
|
T102 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1496 |
1 |
|
|
T100 |
22 |
|
T101 |
21 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T100 |
22 |
|
T101 |
18 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1464 |
1 |
|
|
T100 |
21 |
|
T101 |
21 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T100 |
21 |
|
T101 |
20 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T100 |
20 |
|
T101 |
19 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T100 |
20 |
|
T101 |
17 |
|
T102 |
6 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T100 |
20 |
|
T101 |
17 |
|
T102 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T100 |
19 |
|
T101 |
17 |
|
T102 |
5 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T100 |
17 |
|
T101 |
17 |
|
T102 |
4 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1226 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1165 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T100 |
7 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52247 |
1 |
|
|
T100 |
580 |
|
T101 |
455 |
|
T103 |
1627 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43609 |
1 |
|
|
T100 |
1152 |
|
T101 |
1493 |
|
T102 |
1015 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56658 |
1 |
|
|
T100 |
934 |
|
T101 |
463 |
|
T103 |
1808 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42240 |
1 |
|
|
T100 |
314 |
|
T101 |
267 |
|
T102 |
288 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T100 |
20 |
|
T101 |
18 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T100 |
20 |
|
T101 |
18 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T100 |
20 |
|
T101 |
17 |
|
T102 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T100 |
18 |
|
T101 |
13 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T100 |
17 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1166 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T100 |
17 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T100 |
15 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T103 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
9 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T100 |
13 |
|
T101 |
6 |
|
T103 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T100 |
14 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51028 |
1 |
|
|
T100 |
948 |
|
T101 |
380 |
|
T102 |
244 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44253 |
1 |
|
|
T100 |
1176 |
|
T101 |
1397 |
|
T102 |
93 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54453 |
1 |
|
|
T100 |
661 |
|
T101 |
616 |
|
T102 |
887 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44730 |
1 |
|
|
T100 |
205 |
|
T101 |
292 |
|
T102 |
150 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T100 |
21 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T100 |
20 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T100 |
19 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
18 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T100 |
19 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T100 |
15 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1167 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1194 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
11 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
7 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60198 |
1 |
|
|
T100 |
1155 |
|
T101 |
1468 |
|
T102 |
94 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43481 |
1 |
|
|
T100 |
600 |
|
T101 |
470 |
|
T102 |
1035 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52833 |
1 |
|
|
T100 |
628 |
|
T101 |
417 |
|
T102 |
28 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39019 |
1 |
|
|
T100 |
501 |
|
T101 |
323 |
|
T102 |
163 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T100 |
29 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T100 |
28 |
|
T101 |
17 |
|
T102 |
12 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T100 |
29 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T100 |
28 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T100 |
27 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T100 |
27 |
|
T101 |
16 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T100 |
27 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T100 |
24 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T100 |
24 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1190 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
10 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T100 |
21 |
|
T101 |
12 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1101 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1138 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1077 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1107 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55126 |
1 |
|
|
T100 |
569 |
|
T101 |
526 |
|
T102 |
160 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39038 |
1 |
|
|
T100 |
523 |
|
T101 |
262 |
|
T102 |
844 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60516 |
1 |
|
|
T100 |
1331 |
|
T101 |
1461 |
|
T102 |
50 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40916 |
1 |
|
|
T100 |
630 |
|
T101 |
415 |
|
T102 |
335 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T100 |
26 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T100 |
25 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T100 |
25 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T100 |
21 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1393 |
1 |
|
|
T100 |
25 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T100 |
20 |
|
T101 |
18 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T100 |
20 |
|
T101 |
17 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T100 |
22 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T100 |
18 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1153 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T100 |
16 |
|
T101 |
14 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1091 |
1 |
|
|
T100 |
16 |
|
T101 |
14 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1100 |
1 |
|
|
T100 |
18 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
5 |
|
T102 |
2 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1054 |
1 |
|
|
T100 |
14 |
|
T101 |
14 |
|
T102 |
6 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53746 |
1 |
|
|
T100 |
797 |
|
T101 |
1649 |
|
T102 |
221 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42783 |
1 |
|
|
T100 |
420 |
|
T101 |
278 |
|
T102 |
102 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54952 |
1 |
|
|
T100 |
1445 |
|
T101 |
429 |
|
T102 |
192 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43273 |
1 |
|
|
T100 |
315 |
|
T101 |
347 |
|
T102 |
853 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T100 |
17 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T100 |
14 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T100 |
14 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T100 |
14 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
17 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T100 |
14 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T100 |
13 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T100 |
13 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T100 |
13 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T100 |
13 |
|
T101 |
12 |
|
T102 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T100 |
13 |
|
T101 |
12 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T100 |
13 |
|
T101 |
11 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1131 |
1 |
|
|
T100 |
14 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1106 |
1 |
|
|
T100 |
13 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1061 |
1 |
|
|
T100 |
13 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T100 |
17 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T100 |
12 |
|
T101 |
10 |
|
T102 |
5 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51076 |
1 |
|
|
T100 |
385 |
|
T101 |
553 |
|
T102 |
52 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44399 |
1 |
|
|
T100 |
1175 |
|
T101 |
334 |
|
T102 |
903 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54575 |
1 |
|
|
T100 |
764 |
|
T101 |
1722 |
|
T102 |
129 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44715 |
1 |
|
|
T100 |
615 |
|
T101 |
138 |
|
T102 |
294 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T100 |
31 |
|
T101 |
10 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T100 |
27 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T100 |
30 |
|
T101 |
10 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T100 |
27 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T100 |
30 |
|
T101 |
10 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T100 |
26 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T100 |
29 |
|
T101 |
10 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T100 |
26 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T100 |
27 |
|
T101 |
10 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T100 |
26 |
|
T101 |
9 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1375 |
1 |
|
|
T100 |
24 |
|
T101 |
10 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T100 |
26 |
|
T101 |
9 |
|
T102 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T100 |
24 |
|
T101 |
10 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T100 |
25 |
|
T101 |
8 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T100 |
23 |
|
T101 |
10 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T100 |
22 |
|
T101 |
10 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T100 |
22 |
|
T101 |
9 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T100 |
22 |
|
T101 |
9 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T100 |
19 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T100 |
23 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T100 |
6 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T100 |
18 |
|
T101 |
8 |
|
T102 |
5 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
10 |
|
T101 |
10 |
|
T103 |
17 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1083 |
1 |
|
|
T100 |
22 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57682 |
1 |
|
|
T100 |
748 |
|
T101 |
1551 |
|
T102 |
26 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41764 |
1 |
|
|
T100 |
976 |
|
T101 |
278 |
|
T102 |
173 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49346 |
1 |
|
|
T100 |
954 |
|
T101 |
413 |
|
T102 |
786 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46251 |
1 |
|
|
T100 |
336 |
|
T101 |
466 |
|
T102 |
312 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T100 |
21 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
2 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T100 |
18 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T100 |
18 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T100 |
17 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T100 |
17 |
|
T101 |
10 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T100 |
17 |
|
T101 |
16 |
|
T102 |
11 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T100 |
15 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T100 |
15 |
|
T101 |
16 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T100 |
15 |
|
T101 |
8 |
|
T102 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T100 |
15 |
|
T101 |
16 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
9 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T100 |
15 |
|
T101 |
16 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1168 |
1 |
|
|
T100 |
15 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T100 |
14 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T100 |
14 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T100 |
14 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T100 |
13 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
14 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1083 |
1 |
|
|
T100 |
14 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54024 |
1 |
|
|
T100 |
562 |
|
T101 |
456 |
|
T102 |
474 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44293 |
1 |
|
|
T100 |
506 |
|
T101 |
1615 |
|
T102 |
72 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49266 |
1 |
|
|
T100 |
753 |
|
T101 |
299 |
|
T102 |
149 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47278 |
1 |
|
|
T100 |
1124 |
|
T101 |
313 |
|
T102 |
744 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T100 |
23 |
|
T101 |
17 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T100 |
22 |
|
T101 |
15 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T100 |
24 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T100 |
21 |
|
T101 |
15 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T100 |
11 |
|
T101 |
8 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T100 |
17 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
3 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1091 |
1 |
|
|
T100 |
19 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
11 |
|
T101 |
7 |
|
T102 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T100 |
16 |
|
T101 |
12 |
|
T102 |
2 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51812 |
1 |
|
|
T100 |
608 |
|
T101 |
574 |
|
T102 |
254 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46540 |
1 |
|
|
T100 |
458 |
|
T101 |
1485 |
|
T102 |
167 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56667 |
1 |
|
|
T100 |
798 |
|
T101 |
282 |
|
T102 |
82 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39735 |
1 |
|
|
T100 |
1163 |
|
T101 |
290 |
|
T102 |
819 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T100 |
10 |
|
T101 |
7 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T100 |
22 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T100 |
21 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T100 |
22 |
|
T101 |
18 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T100 |
19 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T100 |
19 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T100 |
21 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T100 |
18 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T100 |
20 |
|
T101 |
17 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T100 |
18 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T100 |
20 |
|
T101 |
16 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T100 |
18 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T100 |
16 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T100 |
16 |
|
T101 |
14 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1136 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T100 |
20 |
|
T101 |
15 |
|
T102 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T100 |
10 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T100 |
10 |
|
T101 |
6 |
|
T102 |
3 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1075 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
4 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52130 |
1 |
|
|
T100 |
796 |
|
T101 |
441 |
|
T102 |
769 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41810 |
1 |
|
|
T100 |
438 |
|
T101 |
197 |
|
T102 |
193 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59171 |
1 |
|
|
T100 |
618 |
|
T101 |
1807 |
|
T102 |
197 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42280 |
1 |
|
|
T100 |
1166 |
|
T101 |
317 |
|
T102 |
160 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
12 |
|
T101 |
12 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T100 |
21 |
|
T101 |
7 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
3 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T100 |
12 |
|
T101 |
12 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T100 |
21 |
|
T101 |
7 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T100 |
21 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T100 |
21 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T100 |
21 |
|
T101 |
7 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T100 |
19 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T100 |
20 |
|
T101 |
7 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T100 |
20 |
|
T101 |
7 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1273 |
1 |
|
|
T100 |
17 |
|
T101 |
9 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T100 |
12 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T100 |
19 |
|
T101 |
7 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T100 |
16 |
|
T101 |
8 |
|
T102 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T100 |
19 |
|
T101 |
7 |
|
T102 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T100 |
16 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1174 |
1 |
|
|
T100 |
16 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T102 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T100 |
16 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T100 |
18 |
|
T101 |
7 |
|
T102 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T100 |
16 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T100 |
17 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1098 |
1 |
|
|
T100 |
15 |
|
T101 |
8 |
|
T102 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1091 |
1 |
|
|
T100 |
17 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T100 |
11 |
|
T101 |
9 |
|
T102 |
2 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1069 |
1 |
|
|
T100 |
15 |
|
T101 |
8 |
|
T102 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
1 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1063 |
1 |
|
|
T100 |
16 |
|
T101 |
6 |
|
T102 |
5 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53739 |
1 |
|
|
T100 |
1144 |
|
T101 |
273 |
|
T102 |
1084 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42123 |
1 |
|
|
T100 |
303 |
|
T101 |
180 |
|
T102 |
196 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
49042 |
1 |
|
|
T100 |
1078 |
|
T101 |
764 |
|
T102 |
26 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49461 |
1 |
|
|
T100 |
585 |
|
T101 |
1496 |
|
T102 |
101 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
617 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
613 |
1 |
|
|
T100 |
12 |
|
T101 |
7 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T100 |
17 |
|
T101 |
14 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T100 |
16 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
614 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T100 |
15 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
611 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
612 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
609 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T100 |
13 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
607 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T100 |
13 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
607 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T100 |
12 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
604 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T100 |
12 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
602 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T100 |
17 |
|
T101 |
15 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T100 |
11 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
600 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T100 |
10 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
601 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
5 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
4 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1189 |
1 |
|
|
T100 |
16 |
|
T101 |
12 |
|
T102 |
3 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
598 |
1 |
|
|
T100 |
12 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
599 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T100 |
15 |
|
T101 |
10 |
|
T102 |
3 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53859 |
1 |
|
|
T100 |
1404 |
|
T101 |
1514 |
|
T102 |
152 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45707 |
1 |
|
|
T100 |
491 |
|
T101 |
224 |
|
T102 |
202 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50599 |
1 |
|
|
T100 |
840 |
|
T101 |
775 |
|
T102 |
69 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45750 |
1 |
|
|
T100 |
279 |
|
T101 |
340 |
|
T102 |
907 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T100 |
22 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
2 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T100 |
22 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T100 |
20 |
|
T101 |
12 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T100 |
22 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T100 |
20 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T100 |
18 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T100 |
21 |
|
T101 |
9 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T100 |
17 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T100 |
16 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T100 |
20 |
|
T101 |
9 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T100 |
20 |
|
T101 |
8 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T100 |
20 |
|
T101 |
8 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T100 |
20 |
|
T101 |
7 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T100 |
13 |
|
T101 |
11 |
|
T102 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1160 |
1 |
|
|
T100 |
19 |
|
T101 |
7 |
|
T102 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1130 |
1 |
|
|
T100 |
11 |
|
T101 |
11 |
|
T102 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1134 |
1 |
|
|
T100 |
19 |
|
T101 |
6 |
|
T102 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T100 |
10 |
|
T101 |
11 |
|
T102 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T100 |
11 |
|
T101 |
6 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1103 |
1 |
|
|
T100 |
19 |
|
T101 |
6 |
|
T102 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
13 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1072 |
1 |
|
|
T100 |
9 |
|
T101 |
11 |
|
T102 |
8 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52778 |
1 |
|
|
T100 |
1475 |
|
T101 |
439 |
|
T102 |
2 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
38299 |
1 |
|
|
T100 |
507 |
|
T101 |
259 |
|
T102 |
226 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52649 |
1 |
|
|
T100 |
507 |
|
T101 |
1636 |
|
T102 |
788 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50124 |
1 |
|
|
T100 |
521 |
|
T101 |
446 |
|
T102 |
284 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T100 |
9 |
|
T101 |
5 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T100 |
25 |
|
T101 |
14 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T100 |
25 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T100 |
22 |
|
T101 |
15 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T100 |
19 |
|
T101 |
13 |
|
T102 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T100 |
9 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T100 |
24 |
|
T101 |
15 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
24 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
11 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T100 |
21 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1260 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T100 |
15 |
|
T101 |
11 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T100 |
20 |
|
T101 |
14 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T100 |
14 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T100 |
11 |
|
T101 |
3 |
|
T103 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T100 |
13 |
|
T101 |
10 |
|
T102 |
10 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
637 |
1 |
|
|
T100 |
8 |
|
T101 |
4 |
|
T102 |
1 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T100 |
20 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54759 |
1 |
|
|
T100 |
667 |
|
T101 |
455 |
|
T102 |
812 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48514 |
1 |
|
|
T100 |
1163 |
|
T101 |
266 |
|
T102 |
223 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50345 |
1 |
|
|
T100 |
629 |
|
T101 |
1637 |
|
T102 |
92 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40402 |
1 |
|
|
T100 |
589 |
|
T101 |
248 |
|
T102 |
203 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T100 |
24 |
|
T101 |
17 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T100 |
23 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T100 |
21 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T100 |
23 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T100 |
23 |
|
T101 |
14 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
3 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T100 |
19 |
|
T101 |
16 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T100 |
19 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T100 |
18 |
|
T101 |
15 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
650 |
1 |
|
|
T100 |
9 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T100 |
18 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T100 |
17 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
8 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T100 |
16 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T100 |
23 |
|
T101 |
13 |
|
T102 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T100 |
15 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T100 |
22 |
|
T101 |
13 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1195 |
1 |
|
|
T100 |
14 |
|
T101 |
12 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T100 |
8 |
|
T101 |
8 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T100 |
14 |
|
T101 |
11 |
|
T102 |
7 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
642 |
1 |
|
|
T100 |
8 |
|
T101 |
10 |
|
T102 |
2 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T100 |
21 |
|
T101 |
13 |
|
T102 |
6 |