Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3291529 |
1 |
|
|
T33 |
40 |
|
T1 |
11 |
|
T14 |
16876 |
| auto[1] |
auto[0] |
auto[1] |
486294 |
1 |
|
|
T33 |
3 |
|
T14 |
2615 |
|
T15 |
159 |
| auto[1] |
auto[1] |
auto[0] |
3291051 |
1 |
|
|
T33 |
67 |
|
T1 |
3 |
|
T14 |
16919 |
| auto[1] |
auto[1] |
auto[1] |
488098 |
1 |
|
|
T33 |
6 |
|
T14 |
2652 |
|
T15 |
159 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |