Unified Coverage Report :: Group :: cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	36	0	36	100.00
Crosses	128	0	128	100.00

Variables for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_cg_cc	128	0	128	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	12337286	1			T31	529		T32	408		T33	79
all_values[1]	12337286	1			T31	529		T32	408		T33	79
all_values[2]	12337286	1			T31	529		T32	408		T33	79
all_values[3]	12337286	1			T31	529		T32	408		T33	79
all_values[4]	12337286	1			T31	529		T32	408		T33	79
all_values[5]	12337286	1			T31	529		T32	408		T33	79
all_values[6]	12337286	1			T31	529		T32	408		T33	79
all_values[7]	12337286	1			T31	529		T32	408		T33	79
all_values[8]	12337286	1			T31	529		T32	408		T33	79
all_values[9]	12337286	1			T31	529		T32	408		T33	79
all_values[10]	12337286	1			T31	529		T32	408		T33	79
all_values[11]	12337286	1			T31	529		T32	408		T33	79
all_values[12]	12337286	1			T31	529		T32	408		T33	79
all_values[13]	12337286	1			T31	529		T32	408		T33	79
all_values[14]	12337286	1			T31	529		T32	408		T33	79
all_values[15]	12337286	1			T31	529		T32	408		T33	79
all_values[16]	12337286	1			T31	529		T32	408		T33	79
all_values[17]	12337286	1			T31	529		T32	408		T33	79
all_values[18]	12337286	1			T31	529		T32	408		T33	79
all_values[19]	12337286	1			T31	529		T32	408		T33	79
all_values[20]	12337286	1			T31	529		T32	408		T33	79
all_values[21]	12337286	1			T31	529		T32	408		T33	79
all_values[22]	12337286	1			T31	529		T32	408		T33	79
all_values[23]	12337286	1			T31	529		T32	408		T33	79
all_values[24]	12337286	1			T31	529		T32	408		T33	79
all_values[25]	12337286	1			T31	529		T32	408		T33	79
all_values[26]	12337286	1			T31	529		T32	408		T33	79
all_values[27]	12337286	1			T31	529		T32	408		T33	79
all_values[28]	12337286	1			T31	529		T32	408		T33	79
all_values[29]	12337286	1			T31	529		T32	408		T33	79
all_values[30]	12337286	1			T31	529		T32	408		T33	79
all_values[31]	12337286	1			T31	529		T32	408		T33	79

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

231436176

1

T31

16928

T32

13056

T33

2528

auto[1]

163356976

1

T36

1637

T40

608626

T41

911

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

99632126

1

T31

16928

T32

13056

T33

2528

auto[1]

295161026

1

T36

2689

T40

108788

T41

1135

---

Summary for Cross intr_cg_cc

Samples crossed: cp_intr cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for intr_cg_cc

Bins

cp_intr	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	2619853	1			T31	529		T32	408		T33	79
all_values[0]	auto[0]	auto[1]	4636368	1			T36	40		T40	17150		T41	28
all_values[0]	auto[1]	auto[0]	508470	1			T36	17		T40	2416		T41	13
all_values[0]	auto[1]	auto[1]	4572595	1			T36	37		T40	16634		T41	11
all_values[1]	auto[0]	auto[0]	2612768	1			T31	529		T32	408		T33	79
all_values[1]	auto[0]	auto[1]	4601847	1			T36	42		T40	16891		T41	23
all_values[1]	auto[1]	auto[0]	498569	1			T36	7		T40	2129		T41	23
all_values[1]	auto[1]	auto[1]	4624102	1			T36	55		T40	17068		T41	11
all_values[2]	auto[0]	auto[0]	2614640	1			T31	529		T32	408		T33	79
all_values[2]	auto[0]	auto[1]	4604046	1			T36	46		T40	17937		T41	10
all_values[2]	auto[1]	auto[0]	499163	1			T36	14		T40	2110		T41	15
all_values[2]	auto[1]	auto[1]	4619437	1			T36	33		T40	16172		T41	13
all_values[3]	auto[0]	auto[0]	2620443	1			T31	529		T32	408		T33	79
all_values[3]	auto[0]	auto[1]	4596182	1			T36	67		T40	17069		T41	25
all_values[3]	auto[1]	auto[0]	500755	1			T36	6		T40	2158		T41	26
all_values[3]	auto[1]	auto[1]	4619906	1			T36	31		T40	16815		T41	8
all_values[4]	auto[0]	auto[0]	2614008	1			T31	529		T32	408		T33	79
all_values[4]	auto[0]	auto[1]	4624006	1			T36	51		T40	18135		T41	48
all_values[4]	auto[1]	auto[0]	489372	1			T36	2		T40	2098		T41	10
all_values[4]	auto[1]	auto[1]	4609900	1			T36	17		T40	15882		T41	9
all_values[5]	auto[0]	auto[0]	2608800	1			T31	529		T32	408		T33	79
all_values[5]	auto[0]	auto[1]	4611383	1			T36	52		T40	18729		T41	18
all_values[5]	auto[1]	auto[0]	495644	1			T36	12		T40	1846		T41	7
all_values[5]	auto[1]	auto[1]	4621459	1			T36	33		T40	15476		T41	19
all_values[6]	auto[0]	auto[0]	2619182	1			T31	529		T32	408		T33	79
all_values[6]	auto[0]	auto[1]	4622389	1			T36	47		T40	16450		T41	21
all_values[6]	auto[1]	auto[0]	497465	1			T36	14		T40	2281		T41	22
all_values[6]	auto[1]	auto[1]	4598250	1			T36	37		T40	17537		T41	11
all_values[7]	auto[0]	auto[0]	2616635	1			T31	529		T32	408		T33	79
all_values[7]	auto[0]	auto[1]	4611811	1			T36	30		T40	16687		T41	11
all_values[7]	auto[1]	auto[0]	498994	1			T36	13		T40	2193		T41	8
all_values[7]	auto[1]	auto[1]	4609846	1			T36	45		T40	17035		T41	23
all_values[8]	auto[0]	auto[0]	2610674	1			T31	529		T32	408		T33	79
all_values[8]	auto[0]	auto[1]	4625913	1			T36	43		T40	16832		T41	26
all_values[8]	auto[1]	auto[0]	498308	1			T36	20		T40	2154		T41	17
all_values[8]	auto[1]	auto[1]	4602391	1			T36	36		T40	16973		T41	17
all_values[9]	auto[0]	auto[0]	2619033	1			T31	529		T32	408		T33	79
all_values[9]	auto[0]	auto[1]	4601519	1			T36	25		T40	17762		T41	33
all_values[9]	auto[1]	auto[0]	506285	1			T36	6		T40	2120		T41	14
all_values[9]	auto[1]	auto[1]	4610449	1			T36	52		T40	16377		T41	14
all_values[10]	auto[0]	auto[0]	2610830	1			T31	529		T32	408		T33	79
all_values[10]	auto[0]	auto[1]	4594375	1			T36	49		T40	16092		T41	7
all_values[10]	auto[1]	auto[0]	498470	1			T36	3		T40	2012		T41	13
all_values[10]	auto[1]	auto[1]	4633611	1			T36	42		T40	17452		T41	18
all_values[11]	auto[0]	auto[0]	2618606	1			T31	529		T32	408		T33	79
all_values[11]	auto[0]	auto[1]	4633892	1			T36	84		T40	17889		T41	15
all_values[11]	auto[1]	auto[0]	496384	1			T36	1		T40	2227		T41	16
all_values[11]	auto[1]	auto[1]	4588404	1			T36	9		T40	16266		T41	19
all_values[12]	auto[0]	auto[0]	2607722	1			T31	529		T32	408		T33	79
all_values[12]	auto[0]	auto[1]	4635147	1			T36	74		T40	17339		T41	28
all_values[12]	auto[1]	auto[0]	496266	1			T40	2035		T41	12		T51	110
all_values[12]	auto[1]	auto[1]	4598151	1			T36	24		T40	16684		T41	2
all_values[13]	auto[0]	auto[0]	2620584	1			T31	529		T32	408		T33	79
all_values[13]	auto[0]	auto[1]	4607805	1			T36	22		T40	16588		T41	28
all_values[13]	auto[1]	auto[0]	501152	1			T36	9		T40	2016		T41	16
all_values[13]	auto[1]	auto[1]	4607745	1			T36	73		T40	17781		T41	21
all_values[14]	auto[0]	auto[0]	2609892	1			T31	529		T32	408		T33	79
all_values[14]	auto[0]	auto[1]	4631325	1			T36	81		T40	16595		T41	35
all_values[14]	auto[1]	auto[0]	493837	1			T40	2179		T41	5		T51	96
all_values[14]	auto[1]	auto[1]	4602232	1			T36	8		T40	17058		T41	19
all_values[15]	auto[0]	auto[0]	2615769	1			T31	529		T32	408		T33	79
all_values[15]	auto[0]	auto[1]	4636766	1			T36	40		T40	16698		T41	16
all_values[15]	auto[1]	auto[0]	503531	1			T36	10		T40	2146		T41	13
all_values[15]	auto[1]	auto[1]	4581220	1			T36	38		T40	17355		T41	16
all_values[16]	auto[0]	auto[0]	2613048	1			T31	529		T32	408		T33	79
all_values[16]	auto[0]	auto[1]	4608589	1			T36	10		T40	17272		T41	22
all_values[16]	auto[1]	auto[0]	499617	1			T36	19		T40	1925		T41	20
all_values[16]	auto[1]	auto[1]	4616032	1			T36	68		T40	17037		T41	1
all_values[17]	auto[0]	auto[0]	2616741	1			T31	529		T32	408		T33	79
all_values[17]	auto[0]	auto[1]	4630198	1			T36	19		T40	15789		T41	16
all_values[17]	auto[1]	auto[0]	502852	1			T36	9		T40	1945		T41	15
all_values[17]	auto[1]	auto[1]	4587495	1			T36	76		T40	18550		T41	28
all_values[18]	auto[0]	auto[0]	2610348	1			T31	529		T32	408		T33	79
all_values[18]	auto[0]	auto[1]	4664310	1			T36	34		T40	16875		T41	28
all_values[18]	auto[1]	auto[0]	493842	1			T36	11		T40	2032		T41	13
all_values[18]	auto[1]	auto[1]	4568786	1			T36	59		T40	17323		T41	13
all_values[19]	auto[0]	auto[0]	2609586	1			T31	529		T32	408		T33	79
all_values[19]	auto[0]	auto[1]	4620678	1			T36	24		T40	17354		T41	20
all_values[19]	auto[1]	auto[0]	497397	1			T36	15		T40	2888		T41	3
all_values[19]	auto[1]	auto[1]	4609625	1			T36	57		T40	15722		T41	22
all_values[20]	auto[0]	auto[0]	2618084	1			T31	529		T32	408		T33	79
all_values[20]	auto[0]	auto[1]	4616698	1			T36	55		T40	17641		T41	23
all_values[20]	auto[1]	auto[0]	503437	1			T36	15		T40	1862		T41	19
all_values[20]	auto[1]	auto[1]	4599067	1			T36	31		T40	16624		T41	14
all_values[21]	auto[0]	auto[0]	2606048	1			T31	529		T32	408		T33	79
all_values[21]	auto[0]	auto[1]	4609249	1			T36	48		T40	17909		T41	31
all_values[21]	auto[1]	auto[0]	502705	1			T36	24		T40	2020		T41	24
all_values[21]	auto[1]	auto[1]	4619284	1			T36	30		T40	15989		T41	11
all_values[22]	auto[0]	auto[0]	2610701	1			T31	529		T32	408		T33	79
all_values[22]	auto[0]	auto[1]	4641845	1			T36	62		T40	17484		T41	10
all_values[22]	auto[1]	auto[0]	503601	1			T36	13		T40	2282		T41	3
all_values[22]	auto[1]	auto[1]	4581139	1			T36	24		T40	16110		T41	10
all_values[23]	auto[0]	auto[0]	2615628	1			T31	529		T32	408		T33	79
all_values[23]	auto[0]	auto[1]	4616764	1			T36	41		T40	15921		T41	30
all_values[23]	auto[1]	auto[0]	507321	1			T36	8		T40	2063		T41	4
all_values[23]	auto[1]	auto[1]	4597573	1			T36	47		T40	18044		T41	12
all_values[24]	auto[0]	auto[0]	2611112	1			T31	529		T32	408		T33	79
all_values[24]	auto[0]	auto[1]	4605869	1			T36	58		T40	17211		T41	17
all_values[24]	auto[1]	auto[0]	496117	1			T36	9		T40	1953		T41	21
all_values[24]	auto[1]	auto[1]	4624188	1			T36	29		T40	16845		T41	7
all_values[25]	auto[0]	auto[0]	2613954	1			T31	529		T32	408		T33	79
all_values[25]	auto[0]	auto[1]	4601742	1			T36	45		T40	16543		T41	18
all_values[25]	auto[1]	auto[0]	496695	1			T36	25		T40	2005		T41	19
all_values[25]	auto[1]	auto[1]	4624895	1			T36	28		T40	17767		T41	8
all_values[26]	auto[0]	auto[0]	2611765	1			T31	529		T32	408		T33	79
all_values[26]	auto[0]	auto[1]	4614813	1			T36	44		T40	17543		T41	24
all_values[26]	auto[1]	auto[0]	504808	1			T36	18		T40	2101		T41	14
all_values[26]	auto[1]	auto[1]	4605900	1			T36	40		T40	16337		T41	19
all_values[27]	auto[0]	auto[0]	2612086	1			T31	529		T32	408		T33	79
all_values[27]	auto[0]	auto[1]	4622948	1			T36	39		T40	17164		T41	32
all_values[27]	auto[1]	auto[0]	493029	1			T36	15		T40	1828		T41	12
all_values[27]	auto[1]	auto[1]	4609223	1			T36	45		T40	17275		T41	8
all_values[28]	auto[0]	auto[0]	2615211	1			T31	529		T32	408		T33	79
all_values[28]	auto[0]	auto[1]	4622492	1			T36	11		T40	16753		T41	20
all_values[28]	auto[1]	auto[0]	496463	1			T36	7		T40	2079		T41	25
all_values[28]	auto[1]	auto[1]	4603120	1			T36	64		T40	17317		T41	12
all_values[29]	auto[0]	auto[0]	2615978	1			T31	529		T32	408		T33	79
all_values[29]	auto[0]	auto[1]	4605444	1			T36	30		T40	16522		T41	16
all_values[29]	auto[1]	auto[0]	505331	1			T36	23		T40	2227		T41	25
all_values[29]	auto[1]	auto[1]	4610533	1			T36	35		T40	17400		T41	4
all_values[30]	auto[0]	auto[0]	2611494	1			T31	529		T32	408		T33	79
all_values[30]	auto[0]	auto[1]	4628981	1			T36	50		T40	17441		T41	9
all_values[30]	auto[1]	auto[0]	504435	1			T36	3		T40	1894		T41	18
all_values[30]	auto[1]	auto[1]	4592376	1			T36	47		T40	16773		T41	17
all_values[31]	auto[0]	auto[0]	2610917	1			T31	529		T32	408		T33	79
all_values[31]	auto[0]	auto[1]	4608642	1			T36	47		T40	16444		T41	21
all_values[31]	auto[1]	auto[0]	499671	1			T36	10		T40	2231		T41	20
all_values[31]	auto[1]	auto[1]	4618056	1			T36	29		T40	17493		T41	9