cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56952 |
1 |
|
|
T32 |
493 |
|
T60 |
1338 |
|
T64 |
1192 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44090 |
1 |
|
|
T32 |
373 |
|
T60 |
727 |
|
T64 |
915 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55687 |
1 |
|
|
T32 |
987 |
|
T60 |
920 |
|
T64 |
1814 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42375 |
1 |
|
|
T32 |
202 |
|
T60 |
569 |
|
T64 |
934 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T32 |
12 |
|
T60 |
29 |
|
T64 |
46 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T32 |
14 |
|
T60 |
26 |
|
T64 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T32 |
14 |
|
T60 |
26 |
|
T64 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1449 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T32 |
13 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T32 |
9 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T32 |
13 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T32 |
9 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
5 |
|
T60 |
14 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1131 |
1 |
|
|
T32 |
9 |
|
T60 |
22 |
|
T64 |
34 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55888 |
1 |
|
|
T32 |
1013 |
|
T60 |
974 |
|
T64 |
1025 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43349 |
1 |
|
|
T32 |
233 |
|
T60 |
432 |
|
T64 |
1018 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54734 |
1 |
|
|
T32 |
577 |
|
T60 |
1148 |
|
T64 |
1575 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43401 |
1 |
|
|
T32 |
274 |
|
T60 |
1085 |
|
T64 |
1209 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1656 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1628 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
47 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
55 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
44 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
43 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
41 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
40 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
54 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T32 |
11 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T32 |
9 |
|
T60 |
19 |
|
T64 |
37 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
52 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
34 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
50 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
49 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
33 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T32 |
10 |
|
T60 |
18 |
|
T64 |
48 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
14 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T32 |
9 |
|
T60 |
18 |
|
T64 |
48 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57555 |
1 |
|
|
T32 |
358 |
|
T60 |
897 |
|
T64 |
1735 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42795 |
1 |
|
|
T32 |
831 |
|
T60 |
652 |
|
T64 |
757 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58753 |
1 |
|
|
T32 |
520 |
|
T60 |
648 |
|
T64 |
2233 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39894 |
1 |
|
|
T32 |
268 |
|
T60 |
1247 |
|
T64 |
483 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T32 |
13 |
|
T60 |
34 |
|
T64 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T32 |
16 |
|
T60 |
35 |
|
T64 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T32 |
13 |
|
T60 |
33 |
|
T64 |
24 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T32 |
16 |
|
T60 |
34 |
|
T64 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T32 |
13 |
|
T60 |
33 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
19 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T32 |
12 |
|
T60 |
32 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T32 |
12 |
|
T60 |
32 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T32 |
16 |
|
T60 |
30 |
|
T64 |
18 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T32 |
11 |
|
T60 |
32 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
17 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
23 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
11 |
|
T60 |
29 |
|
T64 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T32 |
11 |
|
T60 |
28 |
|
T64 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T32 |
14 |
|
T60 |
28 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
22 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T32 |
14 |
|
T60 |
28 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T32 |
10 |
|
T60 |
26 |
|
T64 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1182 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T32 |
14 |
|
T60 |
24 |
|
T64 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
15 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
11 |
|
T64 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1099 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
15 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55065 |
1 |
|
|
T32 |
377 |
|
T60 |
443 |
|
T64 |
1239 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44009 |
1 |
|
|
T32 |
176 |
|
T60 |
1288 |
|
T64 |
1406 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55206 |
1 |
|
|
T32 |
965 |
|
T60 |
574 |
|
T64 |
1319 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46138 |
1 |
|
|
T32 |
443 |
|
T60 |
1015 |
|
T64 |
926 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T32 |
16 |
|
T60 |
40 |
|
T64 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T32 |
16 |
|
T60 |
37 |
|
T64 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T32 |
15 |
|
T60 |
38 |
|
T64 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T32 |
16 |
|
T60 |
37 |
|
T64 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T32 |
14 |
|
T60 |
38 |
|
T64 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T32 |
16 |
|
T60 |
37 |
|
T64 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T32 |
14 |
|
T60 |
35 |
|
T64 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T32 |
16 |
|
T60 |
36 |
|
T64 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T32 |
14 |
|
T60 |
35 |
|
T64 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T32 |
16 |
|
T60 |
34 |
|
T64 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T32 |
12 |
|
T60 |
34 |
|
T64 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T32 |
12 |
|
T60 |
34 |
|
T64 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
12 |
|
T60 |
32 |
|
T64 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T32 |
16 |
|
T60 |
31 |
|
T64 |
42 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
16 |
|
T60 |
30 |
|
T64 |
41 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T32 |
10 |
|
T60 |
30 |
|
T64 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1117 |
1 |
|
|
T32 |
10 |
|
T60 |
30 |
|
T64 |
37 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
21 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1094 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
30 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57557 |
1 |
|
|
T32 |
1077 |
|
T60 |
600 |
|
T64 |
836 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46946 |
1 |
|
|
T32 |
258 |
|
T60 |
716 |
|
T64 |
1018 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52565 |
1 |
|
|
T32 |
364 |
|
T60 |
764 |
|
T64 |
1560 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41796 |
1 |
|
|
T32 |
273 |
|
T60 |
1361 |
|
T64 |
1223 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1572 |
1 |
|
|
T32 |
15 |
|
T60 |
34 |
|
T64 |
57 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T32 |
16 |
|
T60 |
34 |
|
T64 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T32 |
15 |
|
T60 |
33 |
|
T64 |
56 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
52 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T32 |
15 |
|
T60 |
33 |
|
T64 |
55 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T32 |
15 |
|
T60 |
32 |
|
T64 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T32 |
15 |
|
T60 |
31 |
|
T64 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
53 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T32 |
15 |
|
T60 |
31 |
|
T64 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
51 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T32 |
15 |
|
T60 |
31 |
|
T64 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T32 |
15 |
|
T60 |
31 |
|
T64 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T32 |
15 |
|
T60 |
26 |
|
T64 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T32 |
15 |
|
T60 |
25 |
|
T64 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T32 |
14 |
|
T60 |
24 |
|
T64 |
46 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T32 |
13 |
|
T60 |
29 |
|
T64 |
45 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T32 |
13 |
|
T60 |
29 |
|
T64 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1175 |
1 |
|
|
T32 |
10 |
|
T60 |
27 |
|
T64 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1143 |
1 |
|
|
T32 |
10 |
|
T60 |
27 |
|
T64 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
12 |
|
T64 |
19 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1113 |
1 |
|
|
T32 |
10 |
|
T60 |
27 |
|
T64 |
37 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57549 |
1 |
|
|
T32 |
661 |
|
T60 |
957 |
|
T64 |
1346 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37065 |
1 |
|
|
T32 |
180 |
|
T60 |
626 |
|
T64 |
830 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60170 |
1 |
|
|
T32 |
373 |
|
T60 |
1344 |
|
T64 |
1290 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45242 |
1 |
|
|
T32 |
931 |
|
T60 |
560 |
|
T64 |
1467 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T32 |
8 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T32 |
8 |
|
T60 |
24 |
|
T64 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
36 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T32 |
8 |
|
T60 |
22 |
|
T64 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
31 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T32 |
10 |
|
T60 |
18 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
29 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T32 |
10 |
|
T60 |
18 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1111 |
1 |
|
|
T32 |
7 |
|
T60 |
21 |
|
T64 |
28 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1177 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1079 |
1 |
|
|
T32 |
6 |
|
T60 |
21 |
|
T64 |
27 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T32 |
10 |
|
T60 |
16 |
|
T64 |
33 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1043 |
1 |
|
|
T32 |
6 |
|
T60 |
21 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
26 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T32 |
10 |
|
T60 |
16 |
|
T64 |
32 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55906 |
1 |
|
|
T32 |
429 |
|
T60 |
936 |
|
T64 |
1153 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47191 |
1 |
|
|
T32 |
183 |
|
T60 |
445 |
|
T64 |
1194 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54056 |
1 |
|
|
T32 |
1188 |
|
T60 |
1751 |
|
T64 |
1034 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42627 |
1 |
|
|
T32 |
296 |
|
T60 |
542 |
|
T64 |
1408 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1479 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
52 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T32 |
9 |
|
T60 |
21 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1257 |
1 |
|
|
T32 |
9 |
|
T60 |
20 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T32 |
9 |
|
T60 |
20 |
|
T64 |
43 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1204 |
1 |
|
|
T32 |
9 |
|
T60 |
20 |
|
T64 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T32 |
7 |
|
T60 |
20 |
|
T64 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T32 |
10 |
|
T60 |
18 |
|
T64 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
18 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T32 |
7 |
|
T60 |
20 |
|
T64 |
41 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1105 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
37 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50985 |
1 |
|
|
T32 |
322 |
|
T60 |
1058 |
|
T64 |
913 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47360 |
1 |
|
|
T32 |
338 |
|
T60 |
1185 |
|
T64 |
1107 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54093 |
1 |
|
|
T32 |
414 |
|
T60 |
842 |
|
T64 |
1102 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44795 |
1 |
|
|
T32 |
882 |
|
T60 |
401 |
|
T64 |
1651 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1682 |
1 |
|
|
T32 |
21 |
|
T60 |
32 |
|
T64 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T32 |
17 |
|
T60 |
28 |
|
T64 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T32 |
19 |
|
T60 |
32 |
|
T64 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T32 |
16 |
|
T60 |
28 |
|
T64 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T32 |
19 |
|
T60 |
32 |
|
T64 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1590 |
1 |
|
|
T32 |
16 |
|
T60 |
26 |
|
T64 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T32 |
19 |
|
T60 |
30 |
|
T64 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T32 |
16 |
|
T60 |
26 |
|
T64 |
59 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T32 |
18 |
|
T60 |
29 |
|
T64 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
44 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
56 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
53 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
52 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1436 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
39 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
48 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1277 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
37 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
42 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
36 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
40 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
35 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
39 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52701 |
1 |
|
|
T32 |
1176 |
|
T60 |
138 |
|
T64 |
2094 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45529 |
1 |
|
|
T32 |
209 |
|
T60 |
1606 |
|
T64 |
673 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53147 |
1 |
|
|
T32 |
329 |
|
T60 |
371 |
|
T64 |
1160 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47205 |
1 |
|
|
T32 |
336 |
|
T60 |
1099 |
|
T64 |
1097 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1643 |
1 |
|
|
T32 |
12 |
|
T60 |
48 |
|
T64 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T32 |
14 |
|
T60 |
50 |
|
T64 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T32 |
12 |
|
T60 |
48 |
|
T64 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T32 |
14 |
|
T60 |
50 |
|
T64 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T32 |
12 |
|
T60 |
48 |
|
T64 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T32 |
14 |
|
T60 |
48 |
|
T64 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T32 |
12 |
|
T60 |
47 |
|
T64 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T32 |
14 |
|
T60 |
47 |
|
T64 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T32 |
12 |
|
T60 |
45 |
|
T64 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T32 |
14 |
|
T60 |
46 |
|
T64 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T32 |
11 |
|
T60 |
43 |
|
T64 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T32 |
6 |
|
T60 |
4 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1480 |
1 |
|
|
T32 |
14 |
|
T60 |
46 |
|
T64 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T32 |
11 |
|
T60 |
43 |
|
T64 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T32 |
14 |
|
T60 |
45 |
|
T64 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T32 |
11 |
|
T60 |
43 |
|
T64 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T32 |
13 |
|
T60 |
45 |
|
T64 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T32 |
10 |
|
T60 |
42 |
|
T64 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T32 |
13 |
|
T60 |
45 |
|
T64 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T32 |
9 |
|
T60 |
41 |
|
T64 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T32 |
13 |
|
T60 |
44 |
|
T64 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T32 |
8 |
|
T60 |
40 |
|
T64 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T32 |
13 |
|
T60 |
43 |
|
T64 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T32 |
8 |
|
T60 |
39 |
|
T64 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T32 |
13 |
|
T60 |
42 |
|
T64 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T32 |
8 |
|
T60 |
37 |
|
T64 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T32 |
13 |
|
T60 |
42 |
|
T64 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T32 |
7 |
|
T60 |
36 |
|
T64 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T32 |
12 |
|
T60 |
42 |
|
T64 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
24 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T32 |
7 |
|
T60 |
35 |
|
T64 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T32 |
6 |
|
T60 |
3 |
|
T64 |
22 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T32 |
12 |
|
T60 |
41 |
|
T64 |
32 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60463 |
1 |
|
|
T32 |
587 |
|
T60 |
782 |
|
T64 |
1131 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42336 |
1 |
|
|
T32 |
275 |
|
T60 |
876 |
|
T64 |
1438 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53970 |
1 |
|
|
T32 |
436 |
|
T60 |
652 |
|
T64 |
1406 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44224 |
1 |
|
|
T32 |
797 |
|
T60 |
1274 |
|
T64 |
1105 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T32 |
10 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T32 |
9 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T32 |
9 |
|
T60 |
33 |
|
T64 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T32 |
9 |
|
T60 |
33 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
38 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T32 |
9 |
|
T60 |
32 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T32 |
12 |
|
T60 |
29 |
|
T64 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T32 |
8 |
|
T60 |
30 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T32 |
8 |
|
T60 |
30 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T32 |
8 |
|
T60 |
30 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T32 |
8 |
|
T60 |
28 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T32 |
8 |
|
T60 |
27 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
8 |
|
T60 |
26 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T32 |
8 |
|
T60 |
25 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1171 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T32 |
8 |
|
T60 |
25 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1139 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1112 |
1 |
|
|
T32 |
7 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1108 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
8 |
|
T60 |
7 |
|
T64 |
20 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1085 |
1 |
|
|
T32 |
7 |
|
T60 |
23 |
|
T64 |
32 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54050 |
1 |
|
|
T32 |
1402 |
|
T60 |
1149 |
|
T64 |
1568 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42716 |
1 |
|
|
T32 |
334 |
|
T60 |
431 |
|
T64 |
847 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57295 |
1 |
|
|
T32 |
357 |
|
T60 |
1061 |
|
T64 |
1657 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44549 |
1 |
|
|
T32 |
112 |
|
T60 |
974 |
|
T64 |
1024 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T32 |
8 |
|
T60 |
24 |
|
T64 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T32 |
6 |
|
T60 |
23 |
|
T64 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T32 |
6 |
|
T60 |
23 |
|
T64 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1539 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T32 |
5 |
|
T60 |
21 |
|
T64 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T32 |
5 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T32 |
3 |
|
T60 |
19 |
|
T64 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T32 |
8 |
|
T60 |
21 |
|
T64 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T32 |
8 |
|
T60 |
20 |
|
T64 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T32 |
8 |
|
T60 |
20 |
|
T64 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T32 |
8 |
|
T60 |
20 |
|
T64 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T32 |
3 |
|
T60 |
18 |
|
T64 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T32 |
2 |
|
T60 |
17 |
|
T64 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T32 |
2 |
|
T60 |
17 |
|
T64 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
22 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1173 |
1 |
|
|
T32 |
6 |
|
T60 |
17 |
|
T64 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T32 |
2 |
|
T60 |
16 |
|
T64 |
31 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53698 |
1 |
|
|
T32 |
520 |
|
T60 |
362 |
|
T64 |
1841 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46273 |
1 |
|
|
T32 |
888 |
|
T60 |
735 |
|
T64 |
832 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56613 |
1 |
|
|
T32 |
298 |
|
T60 |
855 |
|
T64 |
1694 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42358 |
1 |
|
|
T32 |
297 |
|
T60 |
1439 |
|
T64 |
703 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T32 |
13 |
|
T60 |
38 |
|
T64 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T32 |
16 |
|
T60 |
36 |
|
T64 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T32 |
13 |
|
T60 |
37 |
|
T64 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T32 |
16 |
|
T60 |
35 |
|
T64 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T32 |
13 |
|
T60 |
35 |
|
T64 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T32 |
16 |
|
T60 |
34 |
|
T64 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
657 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T32 |
13 |
|
T60 |
35 |
|
T64 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T32 |
15 |
|
T60 |
34 |
|
T64 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T32 |
13 |
|
T60 |
35 |
|
T64 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T32 |
15 |
|
T60 |
33 |
|
T64 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T32 |
13 |
|
T60 |
34 |
|
T64 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T32 |
13 |
|
T60 |
33 |
|
T64 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T32 |
14 |
|
T60 |
32 |
|
T64 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T32 |
13 |
|
T60 |
32 |
|
T64 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T32 |
14 |
|
T60 |
32 |
|
T64 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T32 |
13 |
|
T60 |
32 |
|
T64 |
34 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T32 |
13 |
|
T60 |
32 |
|
T64 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T32 |
13 |
|
T60 |
31 |
|
T64 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
13 |
|
T60 |
29 |
|
T64 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
25 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T32 |
10 |
|
T60 |
26 |
|
T64 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
24 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1178 |
1 |
|
|
T32 |
10 |
|
T60 |
26 |
|
T64 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
5 |
|
T60 |
12 |
|
T64 |
27 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T32 |
9 |
|
T60 |
30 |
|
T64 |
23 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54439 |
1 |
|
|
T32 |
259 |
|
T60 |
1461 |
|
T64 |
1118 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45870 |
1 |
|
|
T32 |
1069 |
|
T60 |
744 |
|
T64 |
1011 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54185 |
1 |
|
|
T32 |
478 |
|
T60 |
915 |
|
T64 |
1450 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45269 |
1 |
|
|
T32 |
189 |
|
T60 |
466 |
|
T64 |
1318 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T32 |
15 |
|
T60 |
25 |
|
T64 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T32 |
14 |
|
T60 |
25 |
|
T64 |
46 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T32 |
15 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T32 |
14 |
|
T60 |
25 |
|
T64 |
45 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T32 |
15 |
|
T60 |
24 |
|
T64 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T32 |
14 |
|
T60 |
25 |
|
T64 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T32 |
14 |
|
T60 |
24 |
|
T64 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1329 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1307 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1242 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1185 |
1 |
|
|
T32 |
8 |
|
T60 |
19 |
|
T64 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T32 |
13 |
|
T60 |
19 |
|
T64 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1156 |
1 |
|
|
T32 |
7 |
|
T60 |
19 |
|
T64 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
14 |
|
T64 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T32 |
13 |
|
T60 |
19 |
|
T64 |
31 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1132 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
35 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52752 |
1 |
|
|
T32 |
172 |
|
T60 |
523 |
|
T64 |
1474 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47489 |
1 |
|
|
T32 |
461 |
|
T60 |
1023 |
|
T64 |
1506 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52602 |
1 |
|
|
T32 |
449 |
|
T60 |
467 |
|
T64 |
1133 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45501 |
1 |
|
|
T32 |
894 |
|
T60 |
1365 |
|
T64 |
829 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T32 |
17 |
|
T60 |
42 |
|
T64 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1641 |
1 |
|
|
T32 |
17 |
|
T60 |
42 |
|
T64 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1598 |
1 |
|
|
T32 |
16 |
|
T60 |
41 |
|
T64 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T32 |
17 |
|
T60 |
42 |
|
T64 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T32 |
16 |
|
T60 |
41 |
|
T64 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1584 |
1 |
|
|
T32 |
17 |
|
T60 |
40 |
|
T64 |
45 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T32 |
15 |
|
T60 |
40 |
|
T64 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T32 |
16 |
|
T60 |
38 |
|
T64 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T32 |
15 |
|
T60 |
40 |
|
T64 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T32 |
13 |
|
T60 |
37 |
|
T64 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T32 |
14 |
|
T60 |
40 |
|
T64 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T32 |
8 |
|
T60 |
6 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T32 |
12 |
|
T60 |
37 |
|
T64 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T32 |
14 |
|
T60 |
40 |
|
T64 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T32 |
14 |
|
T60 |
40 |
|
T64 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T32 |
14 |
|
T60 |
40 |
|
T64 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T32 |
12 |
|
T60 |
35 |
|
T64 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T32 |
14 |
|
T60 |
40 |
|
T64 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T32 |
12 |
|
T60 |
35 |
|
T64 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T32 |
14 |
|
T60 |
38 |
|
T64 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T32 |
12 |
|
T60 |
35 |
|
T64 |
31 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T32 |
14 |
|
T60 |
38 |
|
T64 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T32 |
12 |
|
T60 |
34 |
|
T64 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T32 |
14 |
|
T60 |
37 |
|
T64 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T32 |
12 |
|
T60 |
34 |
|
T64 |
30 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T32 |
14 |
|
T60 |
37 |
|
T64 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
28 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
21 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T32 |
13 |
|
T60 |
37 |
|
T64 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
648 |
1 |
|
|
T32 |
7 |
|
T60 |
5 |
|
T64 |
19 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
26 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53919 |
1 |
|
|
T32 |
106 |
|
T60 |
895 |
|
T64 |
1524 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46315 |
1 |
|
|
T32 |
410 |
|
T60 |
751 |
|
T64 |
1198 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55357 |
1 |
|
|
T32 |
460 |
|
T60 |
590 |
|
T64 |
1289 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41920 |
1 |
|
|
T32 |
1000 |
|
T60 |
1295 |
|
T64 |
891 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T32 |
21 |
|
T60 |
32 |
|
T64 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T32 |
18 |
|
T60 |
35 |
|
T64 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T32 |
20 |
|
T60 |
31 |
|
T64 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
47 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T32 |
19 |
|
T60 |
31 |
|
T64 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
45 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T32 |
19 |
|
T60 |
31 |
|
T64 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T32 |
19 |
|
T60 |
30 |
|
T64 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T32 |
19 |
|
T60 |
29 |
|
T64 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T32 |
18 |
|
T60 |
28 |
|
T64 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T32 |
18 |
|
T60 |
27 |
|
T64 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
18 |
|
T60 |
27 |
|
T64 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T32 |
18 |
|
T60 |
27 |
|
T64 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T32 |
17 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T32 |
16 |
|
T60 |
24 |
|
T64 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1282 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
16 |
|
T60 |
23 |
|
T64 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T32 |
16 |
|
T60 |
22 |
|
T64 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
3 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T32 |
15 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
20 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
33 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56385 |
1 |
|
|
T32 |
1143 |
|
T60 |
876 |
|
T64 |
2060 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41284 |
1 |
|
|
T32 |
233 |
|
T60 |
650 |
|
T64 |
828 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65116 |
1 |
|
|
T32 |
440 |
|
T60 |
845 |
|
T64 |
1467 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
36712 |
1 |
|
|
T32 |
233 |
|
T60 |
1092 |
|
T64 |
916 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T32 |
15 |
|
T60 |
30 |
|
T64 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T32 |
13 |
|
T60 |
30 |
|
T64 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
34 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1252 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T32 |
11 |
|
T60 |
24 |
|
T64 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
28 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
12 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1129 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
18 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1122 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
28 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57193 |
1 |
|
|
T32 |
353 |
|
T60 |
743 |
|
T64 |
1374 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41409 |
1 |
|
|
T32 |
323 |
|
T60 |
693 |
|
T64 |
540 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58702 |
1 |
|
|
T32 |
895 |
|
T60 |
1233 |
|
T64 |
2702 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42773 |
1 |
|
|
T32 |
417 |
|
T60 |
854 |
|
T64 |
548 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
32 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
26 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T32 |
11 |
|
T60 |
31 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T32 |
16 |
|
T60 |
31 |
|
T64 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T32 |
15 |
|
T60 |
30 |
|
T64 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T32 |
11 |
|
T60 |
28 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T32 |
15 |
|
T60 |
30 |
|
T64 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T32 |
7 |
|
T60 |
11 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
28 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1293 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T32 |
13 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T32 |
13 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
27 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
31 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1212 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
25 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1160 |
1 |
|
|
T32 |
11 |
|
T60 |
28 |
|
T64 |
20 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
24 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1085 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
23 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
7 |
|
T60 |
10 |
|
T64 |
30 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1125 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
20 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52663 |
1 |
|
|
T32 |
488 |
|
T60 |
601 |
|
T64 |
1457 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41351 |
1 |
|
|
T32 |
292 |
|
T60 |
1275 |
|
T64 |
975 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51801 |
1 |
|
|
T32 |
841 |
|
T60 |
730 |
|
T64 |
1726 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52539 |
1 |
|
|
T32 |
350 |
|
T60 |
662 |
|
T64 |
964 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T32 |
18 |
|
T60 |
38 |
|
T64 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T32 |
18 |
|
T60 |
36 |
|
T64 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T32 |
18 |
|
T60 |
38 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T32 |
17 |
|
T60 |
35 |
|
T64 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T32 |
18 |
|
T60 |
38 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T32 |
16 |
|
T60 |
34 |
|
T64 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T32 |
16 |
|
T60 |
32 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
6 |
|
T60 |
15 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T32 |
16 |
|
T60 |
30 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T32 |
16 |
|
T60 |
35 |
|
T64 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T32 |
16 |
|
T60 |
29 |
|
T64 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T32 |
16 |
|
T60 |
35 |
|
T64 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T32 |
15 |
|
T60 |
29 |
|
T64 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T32 |
15 |
|
T60 |
35 |
|
T64 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
35 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T32 |
15 |
|
T60 |
35 |
|
T64 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T32 |
15 |
|
T60 |
28 |
|
T64 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1285 |
1 |
|
|
T32 |
15 |
|
T60 |
34 |
|
T64 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T32 |
15 |
|
T60 |
34 |
|
T64 |
30 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T32 |
15 |
|
T60 |
27 |
|
T64 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T32 |
13 |
|
T60 |
33 |
|
T64 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T32 |
15 |
|
T60 |
26 |
|
T64 |
31 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T32 |
5 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T32 |
11 |
|
T60 |
33 |
|
T64 |
28 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
17 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T32 |
15 |
|
T60 |
25 |
|
T64 |
31 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54846 |
1 |
|
|
T32 |
127 |
|
T60 |
1241 |
|
T64 |
1085 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45885 |
1 |
|
|
T32 |
517 |
|
T60 |
449 |
|
T64 |
813 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53778 |
1 |
|
|
T32 |
919 |
|
T60 |
1520 |
|
T64 |
2137 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43613 |
1 |
|
|
T32 |
363 |
|
T60 |
355 |
|
T64 |
923 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T32 |
22 |
|
T60 |
21 |
|
T64 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1580 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T32 |
22 |
|
T60 |
21 |
|
T64 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T32 |
21 |
|
T60 |
20 |
|
T64 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T32 |
19 |
|
T60 |
19 |
|
T64 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T32 |
21 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T32 |
19 |
|
T60 |
18 |
|
T64 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T32 |
21 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T32 |
18 |
|
T60 |
18 |
|
T64 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T32 |
21 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T32 |
17 |
|
T60 |
18 |
|
T64 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T32 |
21 |
|
T60 |
20 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T32 |
17 |
|
T60 |
17 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1368 |
1 |
|
|
T32 |
17 |
|
T60 |
17 |
|
T64 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
36 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T32 |
16 |
|
T60 |
17 |
|
T64 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T32 |
16 |
|
T60 |
17 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T32 |
20 |
|
T60 |
19 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T32 |
15 |
|
T60 |
16 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T32 |
18 |
|
T60 |
18 |
|
T64 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T32 |
15 |
|
T60 |
16 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T32 |
18 |
|
T60 |
18 |
|
T64 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T32 |
14 |
|
T60 |
16 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T32 |
17 |
|
T60 |
18 |
|
T64 |
29 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T32 |
14 |
|
T60 |
15 |
|
T64 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
3 |
|
T60 |
17 |
|
T64 |
24 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
17 |
|
T60 |
18 |
|
T64 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
23 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T32 |
13 |
|
T60 |
14 |
|
T64 |
33 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61838 |
1 |
|
|
T32 |
423 |
|
T60 |
1183 |
|
T64 |
1532 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40333 |
1 |
|
|
T32 |
293 |
|
T60 |
535 |
|
T64 |
1325 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56236 |
1 |
|
|
T32 |
472 |
|
T60 |
1524 |
|
T64 |
1372 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41784 |
1 |
|
|
T32 |
848 |
|
T60 |
457 |
|
T64 |
870 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T32 |
13 |
|
T60 |
18 |
|
T64 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T32 |
12 |
|
T60 |
18 |
|
T64 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T32 |
12 |
|
T60 |
18 |
|
T64 |
44 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T32 |
12 |
|
T60 |
17 |
|
T64 |
43 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T32 |
12 |
|
T60 |
17 |
|
T64 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T32 |
12 |
|
T60 |
17 |
|
T64 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T32 |
10 |
|
T60 |
16 |
|
T64 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T32 |
10 |
|
T60 |
16 |
|
T64 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1253 |
1 |
|
|
T32 |
10 |
|
T60 |
15 |
|
T64 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T32 |
10 |
|
T60 |
14 |
|
T64 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1201 |
1 |
|
|
T32 |
10 |
|
T60 |
14 |
|
T64 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1183 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T32 |
9 |
|
T60 |
14 |
|
T64 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
8 |
|
T60 |
11 |
|
T64 |
16 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1116 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1104 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
31 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55479 |
1 |
|
|
T32 |
458 |
|
T60 |
797 |
|
T64 |
957 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43607 |
1 |
|
|
T32 |
212 |
|
T60 |
1073 |
|
T64 |
1225 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55178 |
1 |
|
|
T32 |
450 |
|
T60 |
981 |
|
T64 |
1133 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45015 |
1 |
|
|
T32 |
857 |
|
T60 |
622 |
|
T64 |
1520 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
54 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T32 |
14 |
|
T60 |
32 |
|
T64 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T32 |
13 |
|
T60 |
28 |
|
T64 |
53 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T32 |
14 |
|
T60 |
30 |
|
T64 |
50 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
51 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T32 |
14 |
|
T60 |
30 |
|
T64 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
49 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T32 |
14 |
|
T60 |
28 |
|
T64 |
48 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
47 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T32 |
13 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
17 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1238 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1217 |
1 |
|
|
T32 |
13 |
|
T60 |
22 |
|
T64 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1184 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T32 |
9 |
|
T60 |
20 |
|
T64 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
8 |
|
T60 |
13 |
|
T64 |
19 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T32 |
9 |
|
T60 |
19 |
|
T64 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T32 |
9 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
36 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53796 |
1 |
|
|
T32 |
487 |
|
T60 |
1002 |
|
T64 |
1086 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44994 |
1 |
|
|
T32 |
971 |
|
T60 |
1076 |
|
T64 |
1295 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57320 |
1 |
|
|
T32 |
383 |
|
T60 |
809 |
|
T64 |
1402 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42494 |
1 |
|
|
T32 |
233 |
|
T60 |
518 |
|
T64 |
1273 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T32 |
8 |
|
T60 |
28 |
|
T64 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T32 |
8 |
|
T60 |
28 |
|
T64 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1517 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T32 |
8 |
|
T60 |
28 |
|
T64 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T32 |
8 |
|
T60 |
28 |
|
T64 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T32 |
8 |
|
T60 |
27 |
|
T64 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1419 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T32 |
11 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T32 |
8 |
|
T60 |
26 |
|
T64 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T32 |
11 |
|
T60 |
27 |
|
T64 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T32 |
8 |
|
T60 |
25 |
|
T64 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T32 |
10 |
|
T60 |
26 |
|
T64 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T32 |
7 |
|
T60 |
24 |
|
T64 |
33 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T32 |
7 |
|
T60 |
24 |
|
T64 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T32 |
7 |
|
T60 |
24 |
|
T64 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T32 |
7 |
|
T60 |
23 |
|
T64 |
32 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T32 |
7 |
|
T60 |
23 |
|
T64 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T32 |
10 |
|
T60 |
23 |
|
T64 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T32 |
7 |
|
T60 |
23 |
|
T64 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1180 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1176 |
1 |
|
|
T32 |
7 |
|
T60 |
21 |
|
T64 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1150 |
1 |
|
|
T32 |
10 |
|
T60 |
19 |
|
T64 |
38 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T32 |
10 |
|
T60 |
17 |
|
T64 |
20 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T32 |
7 |
|
T60 |
21 |
|
T64 |
28 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58184 |
1 |
|
|
T32 |
348 |
|
T60 |
1659 |
|
T64 |
1328 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44254 |
1 |
|
|
T32 |
226 |
|
T60 |
255 |
|
T64 |
1555 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59280 |
1 |
|
|
T32 |
1235 |
|
T60 |
1258 |
|
T64 |
913 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
38633 |
1 |
|
|
T32 |
273 |
|
T60 |
645 |
|
T64 |
1240 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T32 |
13 |
|
T60 |
15 |
|
T64 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T32 |
14 |
|
T60 |
16 |
|
T64 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T32 |
13 |
|
T60 |
15 |
|
T64 |
40 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T32 |
14 |
|
T60 |
16 |
|
T64 |
43 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T32 |
13 |
|
T60 |
15 |
|
T64 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T32 |
13 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T32 |
13 |
|
T60 |
15 |
|
T64 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1374 |
1 |
|
|
T32 |
13 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T32 |
12 |
|
T60 |
15 |
|
T64 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T32 |
13 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T32 |
12 |
|
T60 |
15 |
|
T64 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1311 |
1 |
|
|
T32 |
13 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T32 |
11 |
|
T60 |
15 |
|
T64 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T32 |
13 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
11 |
|
T60 |
15 |
|
T64 |
35 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
10 |
|
T60 |
14 |
|
T64 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T32 |
10 |
|
T60 |
14 |
|
T64 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T32 |
10 |
|
T60 |
13 |
|
T64 |
30 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T32 |
10 |
|
T60 |
13 |
|
T64 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
42 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1110 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
41 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1124 |
1 |
|
|
T32 |
10 |
|
T60 |
11 |
|
T64 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1087 |
1 |
|
|
T32 |
11 |
|
T60 |
15 |
|
T64 |
39 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T32 |
6 |
|
T60 |
14 |
|
T64 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1090 |
1 |
|
|
T32 |
9 |
|
T60 |
10 |
|
T64 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
16 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1053 |
1 |
|
|
T32 |
11 |
|
T60 |
14 |
|
T64 |
38 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57393 |
1 |
|
|
T32 |
407 |
|
T60 |
1600 |
|
T64 |
1489 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44390 |
1 |
|
|
T32 |
326 |
|
T60 |
472 |
|
T64 |
554 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56279 |
1 |
|
|
T32 |
982 |
|
T60 |
637 |
|
T64 |
1255 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42148 |
1 |
|
|
T32 |
322 |
|
T60 |
729 |
|
T64 |
1683 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T32 |
14 |
|
T60 |
31 |
|
T64 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T32 |
14 |
|
T60 |
30 |
|
T64 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T32 |
13 |
|
T60 |
29 |
|
T64 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T32 |
16 |
|
T60 |
33 |
|
T64 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1319 |
1 |
|
|
T32 |
13 |
|
T60 |
32 |
|
T64 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T32 |
13 |
|
T60 |
31 |
|
T64 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T32 |
13 |
|
T60 |
31 |
|
T64 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
34 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T32 |
12 |
|
T60 |
20 |
|
T64 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1165 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T32 |
11 |
|
T60 |
18 |
|
T64 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1142 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T32 |
11 |
|
T60 |
16 |
|
T64 |
28 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1117 |
1 |
|
|
T32 |
11 |
|
T60 |
28 |
|
T64 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T32 |
7 |
|
T60 |
15 |
|
T64 |
21 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1112 |
1 |
|
|
T32 |
10 |
|
T60 |
14 |
|
T64 |
27 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T32 |
6 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1081 |
1 |
|
|
T32 |
11 |
|
T60 |
28 |
|
T64 |
34 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
45621 |
1 |
|
|
T32 |
536 |
|
T60 |
754 |
|
T64 |
1195 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45913 |
1 |
|
|
T32 |
886 |
|
T60 |
1163 |
|
T64 |
898 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60064 |
1 |
|
|
T32 |
447 |
|
T60 |
731 |
|
T64 |
1707 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47746 |
1 |
|
|
T32 |
205 |
|
T60 |
732 |
|
T64 |
1057 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1602 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T32 |
11 |
|
T60 |
32 |
|
T64 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T32 |
11 |
|
T60 |
32 |
|
T64 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T32 |
12 |
|
T60 |
35 |
|
T64 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T32 |
10 |
|
T60 |
31 |
|
T64 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T32 |
12 |
|
T60 |
32 |
|
T64 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T32 |
9 |
|
T60 |
31 |
|
T64 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T32 |
12 |
|
T60 |
32 |
|
T64 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T32 |
9 |
|
T60 |
31 |
|
T64 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
646 |
1 |
|
|
T32 |
8 |
|
T60 |
16 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T32 |
9 |
|
T60 |
30 |
|
T64 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T32 |
9 |
|
T60 |
30 |
|
T64 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T32 |
12 |
|
T60 |
28 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
648 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
639 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T32 |
11 |
|
T60 |
26 |
|
T64 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1327 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T32 |
10 |
|
T60 |
26 |
|
T64 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T32 |
10 |
|
T60 |
25 |
|
T64 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
645 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T32 |
10 |
|
T60 |
24 |
|
T64 |
39 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1159 |
1 |
|
|
T32 |
10 |
|
T60 |
22 |
|
T64 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T32 |
8 |
|
T60 |
15 |
|
T64 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T32 |
9 |
|
T60 |
26 |
|
T64 |
40 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53900 |
1 |
|
|
T32 |
956 |
|
T60 |
447 |
|
T64 |
1119 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39985 |
1 |
|
|
T32 |
217 |
|
T60 |
910 |
|
T64 |
1149 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58189 |
1 |
|
|
T32 |
677 |
|
T60 |
555 |
|
T64 |
1482 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47348 |
1 |
|
|
T32 |
216 |
|
T60 |
1481 |
|
T64 |
1051 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T32 |
13 |
|
T60 |
40 |
|
T64 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T32 |
11 |
|
T60 |
40 |
|
T64 |
56 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T32 |
13 |
|
T60 |
40 |
|
T64 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T32 |
11 |
|
T60 |
39 |
|
T64 |
55 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T32 |
12 |
|
T60 |
38 |
|
T64 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T32 |
11 |
|
T60 |
39 |
|
T64 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T32 |
11 |
|
T60 |
36 |
|
T64 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T32 |
11 |
|
T60 |
38 |
|
T64 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T32 |
11 |
|
T60 |
35 |
|
T64 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T32 |
11 |
|
T60 |
38 |
|
T64 |
52 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T32 |
11 |
|
T60 |
35 |
|
T64 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T32 |
9 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T32 |
10 |
|
T60 |
36 |
|
T64 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T32 |
11 |
|
T60 |
34 |
|
T64 |
49 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T32 |
10 |
|
T60 |
36 |
|
T64 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T32 |
11 |
|
T60 |
32 |
|
T64 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T32 |
10 |
|
T60 |
34 |
|
T64 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T32 |
11 |
|
T60 |
31 |
|
T64 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
10 |
|
T60 |
33 |
|
T64 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1284 |
1 |
|
|
T32 |
10 |
|
T60 |
33 |
|
T64 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T32 |
11 |
|
T60 |
30 |
|
T64 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T32 |
10 |
|
T60 |
32 |
|
T64 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1225 |
1 |
|
|
T32 |
10 |
|
T60 |
30 |
|
T64 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T32 |
10 |
|
T60 |
31 |
|
T64 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T32 |
9 |
|
T60 |
31 |
|
T64 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T32 |
8 |
|
T60 |
29 |
|
T64 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1172 |
1 |
|
|
T32 |
9 |
|
T60 |
30 |
|
T64 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1142 |
1 |
|
|
T32 |
8 |
|
T60 |
29 |
|
T64 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
16 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T32 |
9 |
|
T60 |
30 |
|
T64 |
38 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52715 |
1 |
|
|
T32 |
160 |
|
T60 |
646 |
|
T64 |
922 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44704 |
1 |
|
|
T32 |
224 |
|
T60 |
845 |
|
T64 |
1553 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58167 |
1 |
|
|
T32 |
1215 |
|
T60 |
1444 |
|
T64 |
1636 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43196 |
1 |
|
|
T32 |
353 |
|
T60 |
585 |
|
T64 |
830 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T32 |
20 |
|
T60 |
32 |
|
T64 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T32 |
19 |
|
T60 |
31 |
|
T64 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T32 |
19 |
|
T60 |
31 |
|
T64 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T32 |
19 |
|
T60 |
30 |
|
T64 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T32 |
17 |
|
T60 |
30 |
|
T64 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T32 |
19 |
|
T60 |
29 |
|
T64 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T32 |
17 |
|
T60 |
29 |
|
T64 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T32 |
19 |
|
T60 |
27 |
|
T64 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T32 |
17 |
|
T60 |
27 |
|
T64 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T32 |
17 |
|
T60 |
27 |
|
T64 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T32 |
16 |
|
T60 |
27 |
|
T64 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T32 |
16 |
|
T60 |
27 |
|
T64 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T32 |
16 |
|
T60 |
26 |
|
T64 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T32 |
16 |
|
T60 |
27 |
|
T64 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T32 |
16 |
|
T60 |
26 |
|
T64 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T32 |
16 |
|
T60 |
27 |
|
T64 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T32 |
15 |
|
T60 |
26 |
|
T64 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T32 |
16 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
15 |
|
T60 |
26 |
|
T64 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
18 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T32 |
16 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T32 |
14 |
|
T60 |
25 |
|
T64 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T32 |
16 |
|
T60 |
25 |
|
T64 |
34 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T32 |
14 |
|
T60 |
24 |
|
T64 |
41 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T32 |
15 |
|
T60 |
25 |
|
T64 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T32 |
13 |
|
T60 |
21 |
|
T64 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T32 |
15 |
|
T60 |
24 |
|
T64 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1194 |
1 |
|
|
T32 |
11 |
|
T60 |
20 |
|
T64 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T32 |
14 |
|
T60 |
24 |
|
T64 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
674 |
1 |
|
|
T32 |
5 |
|
T60 |
11 |
|
T64 |
20 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1162 |
1 |
|
|
T32 |
11 |
|
T60 |
20 |
|
T64 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
17 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1154 |
1 |
|
|
T32 |
14 |
|
T60 |
23 |
|
T64 |
28 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51468 |
1 |
|
|
T32 |
1109 |
|
T60 |
849 |
|
T64 |
1144 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41636 |
1 |
|
|
T32 |
275 |
|
T60 |
743 |
|
T64 |
964 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58289 |
1 |
|
|
T32 |
539 |
|
T60 |
754 |
|
T64 |
1895 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47165 |
1 |
|
|
T32 |
167 |
|
T60 |
1278 |
|
T64 |
866 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1573 |
1 |
|
|
T32 |
12 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1561 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
52 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T32 |
12 |
|
T60 |
29 |
|
T64 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T32 |
12 |
|
T60 |
30 |
|
T64 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1507 |
1 |
|
|
T32 |
10 |
|
T60 |
28 |
|
T64 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T32 |
11 |
|
T60 |
29 |
|
T64 |
49 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T32 |
9 |
|
T60 |
28 |
|
T64 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T32 |
11 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T32 |
8 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T32 |
10 |
|
T60 |
29 |
|
T64 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T32 |
9 |
|
T60 |
27 |
|
T64 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T32 |
10 |
|
T60 |
27 |
|
T64 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T32 |
9 |
|
T60 |
26 |
|
T64 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T32 |
10 |
|
T60 |
27 |
|
T64 |
45 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T32 |
9 |
|
T60 |
24 |
|
T64 |
35 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T32 |
9 |
|
T60 |
24 |
|
T64 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1333 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T32 |
8 |
|
T60 |
23 |
|
T64 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T32 |
9 |
|
T60 |
24 |
|
T64 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T32 |
7 |
|
T60 |
21 |
|
T64 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T32 |
9 |
|
T60 |
24 |
|
T64 |
42 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T32 |
6 |
|
T60 |
21 |
|
T64 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
661 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1207 |
1 |
|
|
T32 |
9 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
9 |
|
T64 |
23 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1144 |
1 |
|
|
T32 |
6 |
|
T60 |
20 |
|
T64 |
27 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59366 |
1 |
|
|
T32 |
362 |
|
T60 |
1238 |
|
T64 |
756 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45953 |
1 |
|
|
T32 |
363 |
|
T60 |
909 |
|
T64 |
1269 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54039 |
1 |
|
|
T32 |
883 |
|
T60 |
528 |
|
T64 |
1618 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40101 |
1 |
|
|
T32 |
394 |
|
T60 |
684 |
|
T64 |
1200 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T32 |
17 |
|
T60 |
40 |
|
T64 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T32 |
16 |
|
T60 |
41 |
|
T64 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T32 |
17 |
|
T60 |
40 |
|
T64 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T32 |
16 |
|
T60 |
40 |
|
T64 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1537 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T32 |
15 |
|
T60 |
39 |
|
T64 |
55 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T32 |
17 |
|
T60 |
38 |
|
T64 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T32 |
15 |
|
T60 |
37 |
|
T64 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T32 |
17 |
|
T60 |
37 |
|
T64 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T32 |
16 |
|
T60 |
36 |
|
T64 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T32 |
8 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T32 |
15 |
|
T60 |
36 |
|
T64 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T32 |
12 |
|
T60 |
36 |
|
T64 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
669 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T32 |
15 |
|
T60 |
35 |
|
T64 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T32 |
12 |
|
T60 |
35 |
|
T64 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T32 |
15 |
|
T60 |
35 |
|
T64 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T32 |
12 |
|
T60 |
33 |
|
T64 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T32 |
14 |
|
T60 |
34 |
|
T64 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T32 |
10 |
|
T60 |
33 |
|
T64 |
49 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T32 |
14 |
|
T60 |
33 |
|
T64 |
44 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T32 |
10 |
|
T60 |
32 |
|
T64 |
48 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1278 |
1 |
|
|
T32 |
13 |
|
T60 |
33 |
|
T64 |
43 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T32 |
10 |
|
T60 |
32 |
|
T64 |
47 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1242 |
1 |
|
|
T32 |
13 |
|
T60 |
31 |
|
T64 |
41 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1192 |
1 |
|
|
T32 |
10 |
|
T60 |
32 |
|
T64 |
46 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T32 |
13 |
|
T60 |
31 |
|
T64 |
39 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1148 |
1 |
|
|
T32 |
10 |
|
T60 |
31 |
|
T64 |
45 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T32 |
6 |
|
T60 |
9 |
|
T64 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T32 |
12 |
|
T60 |
31 |
|
T64 |
36 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T32 |
7 |
|
T60 |
8 |
|
T64 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1115 |
1 |
|
|
T32 |
10 |
|
T60 |
31 |
|
T64 |
45 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54118 |
1 |
|
|
T32 |
429 |
|
T60 |
987 |
|
T64 |
1787 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42914 |
1 |
|
|
T32 |
313 |
|
T60 |
1221 |
|
T64 |
1015 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52975 |
1 |
|
|
T32 |
1172 |
|
T60 |
765 |
|
T64 |
1210 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48611 |
1 |
|
|
T32 |
203 |
|
T60 |
617 |
|
T64 |
893 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
44 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
47 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
46 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T32 |
12 |
|
T60 |
27 |
|
T64 |
43 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
42 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
41 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T32 |
11 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T32 |
12 |
|
T60 |
23 |
|
T64 |
39 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T32 |
7 |
|
T60 |
24 |
|
T64 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
37 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T32 |
6 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T32 |
6 |
|
T60 |
23 |
|
T64 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
36 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T32 |
6 |
|
T60 |
21 |
|
T64 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T32 |
6 |
|
T60 |
21 |
|
T64 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T32 |
6 |
|
T60 |
19 |
|
T64 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T32 |
6 |
|
T60 |
19 |
|
T64 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T32 |
6 |
|
T60 |
13 |
|
T64 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T32 |
11 |
|
T60 |
21 |
|
T64 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T32 |
7 |
|
T60 |
12 |
|
T64 |
20 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T32 |
6 |
|
T60 |
18 |
|
T64 |
31 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58078 |
1 |
|
|
T32 |
565 |
|
T60 |
1352 |
|
T64 |
1802 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
37717 |
1 |
|
|
T32 |
816 |
|
T60 |
713 |
|
T64 |
817 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57054 |
1 |
|
|
T32 |
506 |
|
T60 |
474 |
|
T64 |
1156 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46503 |
1 |
|
|
T32 |
196 |
|
T60 |
795 |
|
T64 |
1074 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T32 |
10 |
|
T60 |
34 |
|
T64 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T32 |
8 |
|
T60 |
36 |
|
T64 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T32 |
10 |
|
T60 |
32 |
|
T64 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T32 |
8 |
|
T60 |
36 |
|
T64 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T32 |
10 |
|
T60 |
30 |
|
T64 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T32 |
8 |
|
T60 |
36 |
|
T64 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1460 |
1 |
|
|
T32 |
10 |
|
T60 |
30 |
|
T64 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T32 |
7 |
|
T60 |
36 |
|
T64 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T32 |
7 |
|
T60 |
36 |
|
T64 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T32 |
9 |
|
T60 |
29 |
|
T64 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T32 |
11 |
|
T60 |
13 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1440 |
1 |
|
|
T32 |
7 |
|
T60 |
36 |
|
T64 |
45 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T32 |
9 |
|
T60 |
28 |
|
T64 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T32 |
7 |
|
T60 |
35 |
|
T64 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T32 |
9 |
|
T60 |
26 |
|
T64 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T32 |
7 |
|
T60 |
34 |
|
T64 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T32 |
6 |
|
T60 |
33 |
|
T64 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1282 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T32 |
6 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T32 |
6 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T32 |
9 |
|
T60 |
25 |
|
T64 |
33 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1261 |
1 |
|
|
T32 |
6 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T32 |
9 |
|
T60 |
23 |
|
T64 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T32 |
6 |
|
T60 |
33 |
|
T64 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T32 |
9 |
|
T60 |
23 |
|
T64 |
32 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1188 |
1 |
|
|
T32 |
4 |
|
T60 |
33 |
|
T64 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T32 |
9 |
|
T60 |
15 |
|
T64 |
23 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1146 |
1 |
|
|
T32 |
9 |
|
T60 |
22 |
|
T64 |
31 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T32 |
10 |
|
T60 |
12 |
|
T64 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T32 |
4 |
|
T60 |
32 |
|
T64 |
37 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57752 |
1 |
|
|
T32 |
317 |
|
T60 |
734 |
|
T64 |
1622 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45244 |
1 |
|
|
T32 |
272 |
|
T60 |
683 |
|
T64 |
899 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50497 |
1 |
|
|
T32 |
1212 |
|
T60 |
1364 |
|
T64 |
1443 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44600 |
1 |
|
|
T32 |
233 |
|
T60 |
651 |
|
T64 |
1014 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1603 |
1 |
|
|
T32 |
13 |
|
T60 |
27 |
|
T64 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T32 |
14 |
|
T60 |
29 |
|
T64 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T32 |
12 |
|
T60 |
26 |
|
T64 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T32 |
14 |
|
T60 |
27 |
|
T64 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T32 |
14 |
|
T60 |
26 |
|
T64 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1457 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
36 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T32 |
7 |
|
T60 |
17 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T32 |
13 |
|
T60 |
26 |
|
T64 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T32 |
12 |
|
T60 |
25 |
|
T64 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T32 |
13 |
|
T60 |
25 |
|
T64 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T32 |
12 |
|
T60 |
24 |
|
T64 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T32 |
13 |
|
T60 |
24 |
|
T64 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T32 |
11 |
|
T60 |
23 |
|
T64 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
21 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T32 |
12 |
|
T60 |
22 |
|
T64 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T32 |
11 |
|
T60 |
22 |
|
T64 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T32 |
10 |
|
T60 |
21 |
|
T64 |
27 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T32 |
10 |
|
T60 |
20 |
|
T64 |
26 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1183 |
1 |
|
|
T32 |
12 |
|
T60 |
21 |
|
T64 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T32 |
7 |
|
T60 |
18 |
|
T64 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T32 |
9 |
|
T60 |
18 |
|
T64 |
24 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T32 |
7 |
|
T60 |
16 |
|
T64 |
20 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T32 |
12 |
|
T60 |
19 |
|
T64 |
36 |