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Group Instance : masked_out_lower_mask_data_cov_obj_pin3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin3
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin4
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin4

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin4
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin4
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin5
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin5

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin5
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin5
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin6
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin6

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin6
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin6
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin7
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin7

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin7
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin7
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin8
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin8

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin8
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin8
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin9
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin9

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin9
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin9
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin0
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin1
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin10
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin10

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin10
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin10
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin11
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin11

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin11
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin11
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin12
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin12

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin12
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin12
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin13
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin13

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin13
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin13
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin14
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin14

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin14
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin14
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin15
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin15

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin15
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin15
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin2
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin3
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_upper_mask_data_cov_obj_pin4
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_upper_mask_data_cov_obj_pin4

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_upper_mask_data_cov_obj_pin4
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_upper_mask_data_cov_obj_pin4
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0

Go back
Group Instances:
masked_out_lower_mask_data_cov_obj_pin3
masked_out_lower_mask_data_cov_obj_pin4
masked_out_lower_mask_data_cov_obj_pin5
masked_out_lower_mask_data_cov_obj_pin6
masked_out_lower_mask_data_cov_obj_pin7
masked_out_lower_mask_data_cov_obj_pin8
masked_out_lower_mask_data_cov_obj_pin9
masked_out_upper_mask_data_cov_obj_pin0
masked_out_upper_mask_data_cov_obj_pin1
masked_out_upper_mask_data_cov_obj_pin10
masked_out_upper_mask_data_cov_obj_pin11
masked_out_upper_mask_data_cov_obj_pin12
masked_out_upper_mask_data_cov_obj_pin13
masked_out_upper_mask_data_cov_obj_pin14
masked_out_upper_mask_data_cov_obj_pin15
masked_out_upper_mask_data_cov_obj_pin2
masked_out_upper_mask_data_cov_obj_pin3
masked_out_upper_mask_data_cov_obj_pin4

Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179821 1 T33 4 T34 26 T38 22
auto[1] 179850 1 T33 5 T34 17 T38 16


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180431 1 T33 6 T34 19 T38 20
auto[1] 179240 1 T33 3 T34 24 T38 18


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90161 1 T33 3 T34 10 T38 12
auto[0] auto[1] 89660 1 T33 1 T34 16 T38 10
auto[1] auto[0] 90270 1 T33 3 T34 9 T38 8
auto[1] auto[1] 89580 1 T33 2 T34 8 T38 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180147 1 T33 3 T34 27 T38 20
auto[1] 179524 1 T33 6 T34 16 T38 18


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180228 1 T33 4 T34 24 T38 20
auto[1] 179443 1 T33 5 T34 19 T38 18


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90126 1 T33 1 T34 15 T38 12
auto[0] auto[1] 90021 1 T33 2 T34 12 T38 8
auto[1] auto[0] 90102 1 T33 3 T34 9 T38 8
auto[1] auto[1] 89422 1 T33 3 T34 7 T38 10


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180009 1 T33 5 T34 23 T38 22
auto[1] 179662 1 T33 4 T34 20 T38 16


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179523 1 T33 4 T34 22 T38 15
auto[1] 180148 1 T33 5 T34 21 T38 23


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89988 1 T33 3 T34 12 T38 10
auto[0] auto[1] 90021 1 T33 2 T34 11 T38 12
auto[1] auto[0] 89535 1 T33 1 T34 10 T38 5
auto[1] auto[1] 90127 1 T33 3 T34 10 T38 11


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179913 1 T33 7 T34 17 T38 21
auto[1] 179758 1 T33 2 T34 26 T38 17


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179932 1 T33 6 T34 20 T38 16
auto[1] 179739 1 T33 3 T34 23 T38 22


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90078 1 T33 5 T34 12 T38 5
auto[0] auto[1] 89835 1 T33 2 T34 5 T38 16
auto[1] auto[0] 89854 1 T33 1 T34 8 T38 11
auto[1] auto[1] 89904 1 T33 1 T34 18 T38 6


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180116 1 T33 6 T34 19 T38 21
auto[1] 179555 1 T33 3 T34 24 T38 17


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179916 1 T33 4 T34 26 T38 17
auto[1] 179755 1 T33 5 T34 17 T38 21


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90143 1 T33 2 T34 12 T38 9
auto[0] auto[1] 89973 1 T33 4 T34 7 T38 12
auto[1] auto[0] 89773 1 T33 2 T34 14 T38 8
auto[1] auto[1] 89782 1 T33 1 T34 10 T38 9


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179593 1 T33 3 T34 24 T38 17
auto[1] 180078 1 T33 6 T34 19 T38 21


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179857 1 T33 8 T34 21 T38 22
auto[1] 179814 1 T33 1 T34 22 T38 16


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89679 1 T33 3 T34 12 T38 11
auto[0] auto[1] 89914 1 T34 12 T38 6 T40 356
auto[1] auto[0] 90178 1 T33 5 T34 9 T38 11
auto[1] auto[1] 89900 1 T33 1 T34 10 T38 10


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179953 1 T33 3 T34 19 T38 23
auto[1] 179718 1 T33 6 T34 24 T38 15


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 179819 1 T33 7 T34 19 T38 21
auto[1] 179852 1 T33 2 T34 24 T38 17


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90033 1 T33 2 T34 9 T38 9
auto[0] auto[1] 89920 1 T33 1 T34 10 T38 14
auto[1] auto[0] 89786 1 T33 5 T34 10 T38 12
auto[1] auto[1] 89932 1 T33 1 T34 14 T38 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 181576 1 T33 3 T34 16 T38 13
auto[1] 179944 1 T33 6 T34 19 T38 17


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 181210 1 T33 5 T34 24 T38 16
auto[1] 180310 1 T33 4 T34 11 T38 14


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90804 1 T33 1 T34 10 T38 8
auto[0] auto[1] 90772 1 T33 2 T34 6 T38 5
auto[1] auto[0] 90406 1 T33 4 T34 14 T38 8
auto[1] auto[1] 89538 1 T33 2 T34 5 T38 9


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180901 1 T33 2 T34 18 T38 12
auto[1] 180619 1 T33 7 T34 17 T38 18


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180842 1 T33 2 T34 14 T38 15
auto[1] 180678 1 T33 7 T34 21 T38 15


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90309 1 T33 1 T34 8 T38 5
auto[0] auto[1] 90592 1 T33 1 T34 10 T38 7
auto[1] auto[0] 90533 1 T33 1 T34 6 T38 10
auto[1] auto[1] 90086 1 T33 6 T34 11 T38 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180421 1 T33 3 T34 19 T38 19
auto[1] 181099 1 T33 6 T34 16 T38 11


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180251 1 T33 2 T34 14 T38 16
auto[1] 181269 1 T33 7 T34 21 T38 14


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90411 1 T34 8 T38 9 T40 379
auto[0] auto[1] 90010 1 T33 3 T34 11 T38 10
auto[1] auto[0] 89840 1 T33 2 T34 6 T38 7
auto[1] auto[1] 91259 1 T33 4 T34 10 T38 4


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180549 1 T33 4 T34 17 T38 15
auto[1] 180971 1 T33 5 T34 18 T38 15


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180689 1 T33 5 T34 17 T38 16
auto[1] 180831 1 T33 4 T34 18 T38 14


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 89996 1 T33 3 T34 7 T38 6
auto[0] auto[1] 90553 1 T33 1 T34 10 T38 9
auto[1] auto[0] 90693 1 T33 2 T34 10 T38 10
auto[1] auto[1] 90278 1 T33 3 T34 8 T38 5


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180935 1 T33 5 T34 20 T38 17
auto[1] 180585 1 T33 4 T34 15 T38 13


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180692 1 T33 4 T34 19 T38 12
auto[1] 180828 1 T33 5 T34 16 T38 18


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90496 1 T33 2 T34 9 T38 9
auto[0] auto[1] 90439 1 T33 3 T34 11 T38 8
auto[1] auto[0] 90196 1 T33 2 T34 10 T38 3
auto[1] auto[1] 90389 1 T33 2 T34 5 T38 10


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180458 1 T33 3 T34 21 T38 14
auto[1] 181062 1 T33 6 T34 14 T38 16


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180804 1 T33 2 T34 17 T38 13
auto[1] 180716 1 T33 7 T34 18 T38 17


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90270 1 T33 1 T34 13 T38 5
auto[0] auto[1] 90188 1 T33 2 T34 8 T38 9
auto[1] auto[0] 90534 1 T33 1 T34 4 T38 8
auto[1] auto[1] 90528 1 T33 5 T34 10 T38 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180731 1 T33 5 T34 15 T38 18
auto[1] 180789 1 T33 4 T34 20 T38 12


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180545 1 T33 2 T34 16 T38 11
auto[1] 180975 1 T33 7 T34 19 T38 19


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90488 1 T33 1 T34 8 T38 7
auto[0] auto[1] 90243 1 T33 4 T34 7 T38 11
auto[1] auto[0] 90057 1 T33 1 T34 8 T38 4
auto[1] auto[1] 90732 1 T33 3 T34 12 T38 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180877 1 T33 6 T34 17 T38 12
auto[1] 180643 1 T33 3 T34 18 T38 18


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 181081 1 T33 3 T34 16 T38 14
auto[1] 180439 1 T33 6 T34 19 T38 16


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90528 1 T33 3 T34 4 T38 4
auto[0] auto[1] 90349 1 T33 3 T34 13 T38 8
auto[1] auto[0] 90553 1 T34 12 T38 10 T40 353
auto[1] auto[1] 90090 1 T33 3 T34 6 T38 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180995 1 T33 6 T34 20 T38 12
auto[1] 180525 1 T33 3 T34 15 T38 18


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180680 1 T33 4 T34 19 T38 8
auto[1] 180840 1 T33 5 T34 16 T38 22


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90637 1 T33 2 T34 10 T38 5
auto[0] auto[1] 90358 1 T33 4 T34 10 T38 7
auto[1] auto[0] 90043 1 T33 2 T34 9 T38 3
auto[1] auto[1] 90482 1 T33 1 T34 6 T38 15


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180371 1 T33 5 T34 20 T38 11
auto[1] 181149 1 T33 4 T34 15 T38 19


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180795 1 T33 4 T34 16 T38 12
auto[1] 180725 1 T33 5 T34 19 T38 18


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90396 1 T33 3 T34 10 T38 4
auto[0] auto[1] 89975 1 T33 2 T34 10 T38 7
auto[1] auto[0] 90399 1 T33 1 T34 6 T38 8
auto[1] auto[1] 90750 1 T33 3 T34 9 T38 11


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 180589 1 T33 3 T34 17 T38 15
auto[1] 180931 1 T33 6 T34 18 T38 15


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 181003 1 T33 4 T34 21 T38 17
auto[1] 180517 1 T33 5 T34 14 T38 13


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 90173 1 T33 1 T34 9 T38 9
auto[0] auto[1] 90416 1 T33 2 T34 8 T38 6
auto[1] auto[0] 90830 1 T33 3 T34 12 T38 8
auto[1] auto[1] 90101 1 T33 3 T34 6 T38 7

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%