Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8688070 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
95 |
| auto[1] |
6344290 |
1 |
|
|
T24 |
61 |
|
T1 |
63566 |
|
T14 |
27888 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14223838 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
156 |
| auto[1] |
808522 |
1 |
|
|
T1 |
8934 |
|
T14 |
3860 |
|
T19 |
174 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8682081 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
112 |
| auto[1] |
6350279 |
1 |
|
|
T24 |
44 |
|
T1 |
70378 |
|
T14 |
28612 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2771066 |
1 |
|
|
T24 |
24 |
|
T1 |
32864 |
|
T14 |
12734 |
| auto[1] |
auto[0] |
auto[1] |
404253 |
1 |
|
|
T1 |
4849 |
|
T14 |
1984 |
|
T19 |
74 |
| auto[1] |
auto[1] |
auto[0] |
2770691 |
1 |
|
|
T24 |
20 |
|
T1 |
28580 |
|
T14 |
12018 |
| auto[1] |
auto[1] |
auto[1] |
404269 |
1 |
|
|
T1 |
4085 |
|
T14 |
1876 |
|
T19 |
100 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |