Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8691951 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
101 |
| auto[1] |
6340409 |
1 |
|
|
T24 |
55 |
|
T1 |
67285 |
|
T14 |
27582 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12404920 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
146 |
| auto[1] |
2627440 |
1 |
|
|
T24 |
10 |
|
T1 |
25496 |
|
T14 |
16493 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8667576 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
141 |
| auto[1] |
6364784 |
1 |
|
|
T24 |
15 |
|
T1 |
68809 |
|
T14 |
27991 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1885624 |
1 |
|
|
T24 |
5 |
|
T1 |
21474 |
|
T14 |
5737 |
| auto[1] |
auto[0] |
auto[1] |
1319662 |
1 |
|
|
T24 |
10 |
|
T1 |
12379 |
|
T14 |
8484 |
| auto[1] |
auto[1] |
auto[0] |
1851720 |
1 |
|
|
T1 |
21839 |
|
T14 |
5761 |
|
T19 |
143 |
| auto[1] |
auto[1] |
auto[1] |
1307778 |
1 |
|
|
T1 |
13117 |
|
T14 |
8009 |
|
T19 |
179 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |