Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8712836 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
118 |
| auto[1] |
6319524 |
1 |
|
|
T24 |
38 |
|
T1 |
65531 |
|
T14 |
29731 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14221709 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
156 |
| auto[1] |
810651 |
1 |
|
|
T1 |
8562 |
|
T14 |
4279 |
|
T19 |
153 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8659481 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
120 |
| auto[1] |
6372879 |
1 |
|
|
T24 |
36 |
|
T1 |
68132 |
|
T14 |
31965 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2790219 |
1 |
|
|
T24 |
26 |
|
T1 |
30063 |
|
T14 |
13287 |
| auto[1] |
auto[0] |
auto[1] |
406936 |
1 |
|
|
T1 |
4317 |
|
T14 |
1946 |
|
T19 |
88 |
| auto[1] |
auto[1] |
auto[0] |
2772009 |
1 |
|
|
T24 |
10 |
|
T1 |
29507 |
|
T14 |
14399 |
| auto[1] |
auto[1] |
auto[1] |
403715 |
1 |
|
|
T1 |
4245 |
|
T14 |
2333 |
|
T19 |
65 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |