Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8691705 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
123 |
| auto[1] |
6340655 |
1 |
|
|
T24 |
33 |
|
T1 |
62191 |
|
T14 |
28842 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12419743 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
135 |
| auto[1] |
2612617 |
1 |
|
|
T24 |
21 |
|
T1 |
23520 |
|
T14 |
17322 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8716423 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
125 |
| auto[1] |
6315937 |
1 |
|
|
T24 |
31 |
|
T1 |
63238 |
|
T14 |
28578 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1841420 |
1 |
|
|
T24 |
8 |
|
T1 |
20403 |
|
T14 |
5433 |
| auto[1] |
auto[0] |
auto[1] |
1307596 |
1 |
|
|
T24 |
16 |
|
T1 |
12336 |
|
T14 |
8556 |
| auto[1] |
auto[1] |
auto[0] |
1861900 |
1 |
|
|
T24 |
2 |
|
T1 |
19315 |
|
T14 |
5823 |
| auto[1] |
auto[1] |
auto[1] |
1305021 |
1 |
|
|
T24 |
5 |
|
T1 |
11184 |
|
T14 |
8766 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |