Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8691501 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
105 |
| auto[1] |
6340859 |
1 |
|
|
T24 |
51 |
|
T1 |
69972 |
|
T14 |
28682 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14218521 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
156 |
| auto[1] |
813839 |
1 |
|
|
T1 |
8095 |
|
T14 |
3993 |
|
T19 |
99 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8649378 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
97 |
| auto[1] |
6382982 |
1 |
|
|
T24 |
59 |
|
T1 |
65493 |
|
T14 |
29266 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2770618 |
1 |
|
|
T24 |
39 |
|
T1 |
27852 |
|
T14 |
12848 |
| auto[1] |
auto[0] |
auto[1] |
403984 |
1 |
|
|
T1 |
3944 |
|
T14 |
2066 |
|
T19 |
44 |
| auto[1] |
auto[1] |
auto[0] |
2798525 |
1 |
|
|
T24 |
20 |
|
T1 |
29546 |
|
T14 |
12425 |
| auto[1] |
auto[1] |
auto[1] |
409855 |
1 |
|
|
T1 |
4151 |
|
T14 |
1927 |
|
T19 |
55 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |