Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8684458 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
105 |
| auto[1] |
6347902 |
1 |
|
|
T24 |
51 |
|
T1 |
66830 |
|
T14 |
29301 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14219302 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
156 |
| auto[1] |
813058 |
1 |
|
|
T1 |
8287 |
|
T14 |
3501 |
|
T19 |
155 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8649572 |
1 |
|
|
T22 |
355 |
|
T23 |
32439 |
|
T24 |
116 |
| auto[1] |
6382788 |
1 |
|
|
T24 |
40 |
|
T1 |
66678 |
|
T14 |
26613 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2796113 |
1 |
|
|
T24 |
33 |
|
T1 |
29190 |
|
T14 |
10910 |
| auto[1] |
auto[0] |
auto[1] |
408400 |
1 |
|
|
T1 |
4246 |
|
T14 |
1631 |
|
T19 |
57 |
| auto[1] |
auto[1] |
auto[0] |
2773617 |
1 |
|
|
T24 |
7 |
|
T1 |
29201 |
|
T14 |
12202 |
| auto[1] |
auto[1] |
auto[1] |
404658 |
1 |
|
|
T1 |
4041 |
|
T14 |
1870 |
|
T19 |
98 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |