Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8541807 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6390132 |
1 |
|
|
T29 |
11847 |
|
T1 |
51877 |
|
T12 |
289803 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12284423 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
2647516 |
1 |
|
|
T26 |
1 |
|
T29 |
4423 |
|
T1 |
19753 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8562388 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6369551 |
1 |
|
|
T26 |
3 |
|
T29 |
12613 |
|
T1 |
53184 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1842056 |
1 |
|
|
T26 |
2 |
|
T29 |
4279 |
|
T1 |
17335 |
| auto[1] |
auto[0] |
auto[1] |
1319084 |
1 |
|
|
T26 |
1 |
|
T29 |
2152 |
|
T1 |
10502 |
| auto[1] |
auto[1] |
auto[0] |
1879979 |
1 |
|
|
T29 |
3911 |
|
T1 |
16096 |
|
T12 |
89495 |
| auto[1] |
auto[1] |
auto[1] |
1328432 |
1 |
|
|
T29 |
2271 |
|
T1 |
9251 |
|
T12 |
56223 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |