Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8590808 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6341131 |
1 |
|
|
T26 |
14 |
|
T29 |
13226 |
|
T1 |
54263 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
12288303 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
2643636 |
1 |
|
|
T26 |
3 |
|
T29 |
4039 |
|
T1 |
19470 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8556250 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6375689 |
1 |
|
|
T26 |
3 |
|
T29 |
12171 |
|
T1 |
52092 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1873527 |
1 |
|
|
T29 |
3540 |
|
T1 |
16464 |
|
T12 |
91380 |
| auto[1] |
auto[0] |
auto[1] |
1323326 |
1 |
|
|
T29 |
1783 |
|
T1 |
9446 |
|
T12 |
56222 |
| auto[1] |
auto[1] |
auto[0] |
1858526 |
1 |
|
|
T29 |
4592 |
|
T1 |
16158 |
|
T12 |
87445 |
| auto[1] |
auto[1] |
auto[1] |
1320310 |
1 |
|
|
T26 |
3 |
|
T29 |
2256 |
|
T1 |
10024 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |