Summary for Variable intr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8535067 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
auto[1] |
6396872 |
1 |
|
|
T26 |
4 |
|
T29 |
11650 |
|
T1 |
56092 |
Summary for Variable intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
12292553 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
auto[1] |
2639386 |
1 |
|
|
T29 |
4133 |
|
T1 |
20413 |
|
T12 |
113014 |
Summary for Variable type_ctrl_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
8566529 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
auto[1] |
6365410 |
1 |
|
|
T26 |
13 |
|
T29 |
11650 |
|
T1 |
53886 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[1] |
auto[0] |
auto[0] |
1850599 |
1 |
|
|
T26 |
13 |
|
T29 |
4115 |
|
T1 |
16368 |
auto[1] |
auto[0] |
auto[1] |
1319349 |
1 |
|
|
T29 |
2143 |
|
T1 |
10070 |
|
T12 |
55500 |
auto[1] |
auto[1] |
auto[0] |
1875425 |
1 |
|
|
T29 |
3402 |
|
T1 |
17105 |
|
T12 |
93853 |
auto[1] |
auto[1] |
auto[1] |
1320037 |
1 |
|
|
T29 |
1990 |
|
T1 |
10343 |
|
T12 |
57514 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
NAME | COUNT | STATUS |
intr_type_disabled |
0 |
Excluded |