Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8571799 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6360140 |
1 |
|
|
T26 |
14 |
|
T29 |
12012 |
|
T1 |
55887 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14124712 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
807227 |
1 |
|
|
T29 |
1131 |
|
T1 |
6381 |
|
T12 |
37695 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
8564923 |
1 |
|
|
T23 |
1271 |
|
T24 |
103 |
|
T25 |
349 |
| auto[1] |
6367016 |
1 |
|
|
T26 |
5 |
|
T29 |
11820 |
|
T1 |
53722 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2786982 |
1 |
|
|
T26 |
5 |
|
T29 |
5501 |
|
T1 |
22718 |
| auto[1] |
auto[0] |
auto[1] |
405349 |
1 |
|
|
T29 |
598 |
|
T1 |
3012 |
|
T12 |
19067 |
| auto[1] |
auto[1] |
auto[0] |
2772807 |
1 |
|
|
T29 |
5188 |
|
T1 |
24623 |
|
T12 |
124751 |
| auto[1] |
auto[1] |
auto[1] |
401878 |
1 |
|
|
T29 |
533 |
|
T1 |
3369 |
|
T12 |
18628 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |