cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61936 |
1 |
|
|
T102 |
1265 |
|
T103 |
2572 |
|
T104 |
1037 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51797 |
1 |
|
|
T102 |
973 |
|
T103 |
993 |
|
T104 |
1537 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64211 |
1 |
|
|
T102 |
2446 |
|
T103 |
1519 |
|
T104 |
1264 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50727 |
1 |
|
|
T102 |
1051 |
|
T103 |
994 |
|
T104 |
775 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1835 |
1 |
|
|
T102 |
48 |
|
T103 |
45 |
|
T104 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1824 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
32 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1793 |
1 |
|
|
T102 |
47 |
|
T103 |
44 |
|
T104 |
33 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T102 |
48 |
|
T103 |
44 |
|
T104 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T102 |
47 |
|
T103 |
42 |
|
T104 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T102 |
47 |
|
T103 |
43 |
|
T104 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T102 |
46 |
|
T103 |
40 |
|
T104 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T102 |
47 |
|
T103 |
42 |
|
T104 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T102 |
44 |
|
T103 |
40 |
|
T104 |
30 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T102 |
47 |
|
T103 |
42 |
|
T104 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
25 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T102 |
43 |
|
T103 |
39 |
|
T104 |
29 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T102 |
47 |
|
T103 |
42 |
|
T104 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T102 |
42 |
|
T103 |
39 |
|
T104 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T102 |
46 |
|
T103 |
42 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T102 |
42 |
|
T103 |
39 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T102 |
45 |
|
T103 |
42 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T102 |
42 |
|
T103 |
39 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T102 |
43 |
|
T103 |
38 |
|
T104 |
28 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T102 |
42 |
|
T103 |
38 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T102 |
42 |
|
T103 |
37 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T102 |
41 |
|
T103 |
38 |
|
T104 |
26 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T102 |
40 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T102 |
41 |
|
T103 |
38 |
|
T104 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T102 |
39 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T102 |
39 |
|
T103 |
38 |
|
T104 |
25 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T102 |
39 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T102 |
39 |
|
T103 |
36 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T102 |
37 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T102 |
39 |
|
T103 |
33 |
|
T104 |
21 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
22 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T102 |
35 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
72280 |
1 |
|
|
T102 |
1680 |
|
T103 |
1721 |
|
T104 |
2235 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48839 |
1 |
|
|
T102 |
1687 |
|
T103 |
1023 |
|
T104 |
718 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62777 |
1 |
|
|
T102 |
1595 |
|
T103 |
2193 |
|
T104 |
1341 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44301 |
1 |
|
|
T102 |
866 |
|
T103 |
1159 |
|
T104 |
471 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
884 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1780 |
1 |
|
|
T102 |
46 |
|
T103 |
46 |
|
T104 |
22 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
839 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1815 |
1 |
|
|
T102 |
47 |
|
T103 |
56 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
884 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T102 |
46 |
|
T103 |
46 |
|
T104 |
21 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
839 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T102 |
47 |
|
T103 |
56 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
884 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T102 |
46 |
|
T103 |
44 |
|
T104 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1742 |
1 |
|
|
T102 |
46 |
|
T103 |
55 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
884 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T102 |
45 |
|
T103 |
41 |
|
T104 |
20 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1704 |
1 |
|
|
T102 |
45 |
|
T103 |
54 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
879 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T102 |
45 |
|
T103 |
40 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T102 |
44 |
|
T103 |
52 |
|
T104 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
879 |
1 |
|
|
T102 |
24 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T102 |
44 |
|
T103 |
39 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T102 |
44 |
|
T103 |
51 |
|
T104 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
872 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T102 |
41 |
|
T103 |
38 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T102 |
43 |
|
T103 |
51 |
|
T104 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
872 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T102 |
40 |
|
T103 |
38 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T102 |
43 |
|
T103 |
51 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T102 |
39 |
|
T103 |
37 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T102 |
43 |
|
T103 |
51 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T102 |
39 |
|
T103 |
36 |
|
T104 |
19 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T102 |
43 |
|
T103 |
50 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T102 |
38 |
|
T103 |
32 |
|
T104 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T102 |
41 |
|
T103 |
47 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T102 |
36 |
|
T103 |
30 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
28 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T102 |
39 |
|
T103 |
47 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T102 |
35 |
|
T103 |
30 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T102 |
38 |
|
T103 |
46 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T102 |
34 |
|
T103 |
28 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T102 |
37 |
|
T103 |
46 |
|
T104 |
17 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
866 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
25 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T102 |
34 |
|
T103 |
28 |
|
T104 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
22 |
|
T103 |
21 |
|
T104 |
27 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T102 |
37 |
|
T103 |
45 |
|
T104 |
16 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66736 |
1 |
|
|
T102 |
1935 |
|
T103 |
2051 |
|
T104 |
1015 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53075 |
1 |
|
|
T102 |
1278 |
|
T103 |
1081 |
|
T104 |
922 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56890 |
1 |
|
|
T102 |
1067 |
|
T103 |
2018 |
|
T104 |
1714 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50207 |
1 |
|
|
T102 |
1234 |
|
T103 |
1076 |
|
T104 |
811 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1911 |
1 |
|
|
T102 |
70 |
|
T103 |
49 |
|
T104 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1917 |
1 |
|
|
T102 |
69 |
|
T103 |
50 |
|
T104 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1880 |
1 |
|
|
T102 |
70 |
|
T103 |
46 |
|
T104 |
44 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1867 |
1 |
|
|
T102 |
65 |
|
T103 |
49 |
|
T104 |
39 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1847 |
1 |
|
|
T102 |
69 |
|
T103 |
45 |
|
T104 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1839 |
1 |
|
|
T102 |
64 |
|
T103 |
49 |
|
T104 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1818 |
1 |
|
|
T102 |
67 |
|
T103 |
43 |
|
T104 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1795 |
1 |
|
|
T102 |
63 |
|
T103 |
48 |
|
T104 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T102 |
66 |
|
T103 |
42 |
|
T104 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1757 |
1 |
|
|
T102 |
60 |
|
T103 |
48 |
|
T104 |
34 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T102 |
66 |
|
T103 |
40 |
|
T104 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T102 |
58 |
|
T103 |
47 |
|
T104 |
33 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T102 |
65 |
|
T103 |
39 |
|
T104 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1666 |
1 |
|
|
T102 |
55 |
|
T103 |
46 |
|
T104 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1694 |
1 |
|
|
T102 |
63 |
|
T103 |
38 |
|
T104 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T102 |
55 |
|
T103 |
46 |
|
T104 |
32 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T102 |
61 |
|
T103 |
38 |
|
T104 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T102 |
53 |
|
T103 |
45 |
|
T104 |
31 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T102 |
58 |
|
T103 |
37 |
|
T104 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T102 |
52 |
|
T103 |
44 |
|
T104 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T102 |
57 |
|
T103 |
35 |
|
T104 |
41 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T102 |
50 |
|
T103 |
44 |
|
T104 |
28 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T102 |
56 |
|
T103 |
33 |
|
T104 |
40 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T102 |
49 |
|
T103 |
41 |
|
T104 |
27 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1478 |
1 |
|
|
T102 |
53 |
|
T103 |
33 |
|
T104 |
38 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T102 |
49 |
|
T103 |
39 |
|
T104 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T102 |
53 |
|
T103 |
33 |
|
T104 |
36 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T102 |
47 |
|
T103 |
38 |
|
T104 |
25 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T102 |
51 |
|
T103 |
33 |
|
T104 |
35 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
16 |
|
T103 |
23 |
|
T104 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T102 |
46 |
|
T103 |
38 |
|
T104 |
25 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62994 |
1 |
|
|
T102 |
1252 |
|
T103 |
2823 |
|
T104 |
1070 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
54836 |
1 |
|
|
T102 |
1320 |
|
T103 |
998 |
|
T104 |
965 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62024 |
1 |
|
|
T102 |
1176 |
|
T103 |
1377 |
|
T104 |
1557 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47943 |
1 |
|
|
T102 |
1860 |
|
T103 |
1227 |
|
T104 |
776 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1873 |
1 |
|
|
T102 |
55 |
|
T103 |
40 |
|
T104 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1847 |
1 |
|
|
T102 |
56 |
|
T103 |
46 |
|
T104 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1844 |
1 |
|
|
T102 |
54 |
|
T103 |
38 |
|
T104 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1811 |
1 |
|
|
T102 |
55 |
|
T103 |
45 |
|
T104 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1810 |
1 |
|
|
T102 |
54 |
|
T103 |
38 |
|
T104 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T102 |
53 |
|
T103 |
44 |
|
T104 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1776 |
1 |
|
|
T102 |
54 |
|
T103 |
38 |
|
T104 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1737 |
1 |
|
|
T102 |
51 |
|
T103 |
44 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1752 |
1 |
|
|
T102 |
54 |
|
T103 |
38 |
|
T104 |
52 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
24 |
|
T103 |
24 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T102 |
53 |
|
T103 |
38 |
|
T104 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T102 |
48 |
|
T103 |
42 |
|
T104 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T102 |
53 |
|
T103 |
38 |
|
T104 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T102 |
47 |
|
T103 |
42 |
|
T104 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T102 |
53 |
|
T103 |
38 |
|
T104 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
16 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T102 |
46 |
|
T103 |
40 |
|
T104 |
39 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T102 |
52 |
|
T103 |
36 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T102 |
44 |
|
T103 |
39 |
|
T104 |
40 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T102 |
52 |
|
T103 |
36 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T102 |
41 |
|
T103 |
39 |
|
T104 |
38 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T102 |
51 |
|
T103 |
36 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1472 |
1 |
|
|
T102 |
39 |
|
T103 |
39 |
|
T104 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T102 |
50 |
|
T103 |
35 |
|
T104 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T102 |
38 |
|
T103 |
38 |
|
T104 |
36 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T102 |
49 |
|
T103 |
34 |
|
T104 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1402 |
1 |
|
|
T102 |
37 |
|
T103 |
36 |
|
T104 |
33 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T102 |
46 |
|
T103 |
33 |
|
T104 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T102 |
36 |
|
T103 |
36 |
|
T104 |
32 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
23 |
|
T103 |
23 |
|
T104 |
11 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T102 |
46 |
|
T103 |
31 |
|
T104 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
17 |
|
T104 |
15 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T102 |
34 |
|
T103 |
35 |
|
T104 |
28 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
67407 |
1 |
|
|
T102 |
2495 |
|
T103 |
1261 |
|
T104 |
1115 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52182 |
1 |
|
|
T102 |
916 |
|
T103 |
1181 |
|
T104 |
832 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59883 |
1 |
|
|
T102 |
1651 |
|
T103 |
2455 |
|
T104 |
905 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48374 |
1 |
|
|
T102 |
859 |
|
T103 |
1170 |
|
T104 |
1624 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
851 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1825 |
1 |
|
|
T102 |
39 |
|
T103 |
59 |
|
T104 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
838 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1828 |
1 |
|
|
T102 |
40 |
|
T103 |
50 |
|
T104 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
851 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1786 |
1 |
|
|
T102 |
37 |
|
T103 |
55 |
|
T104 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
838 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
851 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T102 |
37 |
|
T103 |
54 |
|
T104 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1754 |
1 |
|
|
T102 |
37 |
|
T103 |
49 |
|
T104 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
851 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T102 |
37 |
|
T103 |
52 |
|
T104 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T102 |
34 |
|
T103 |
49 |
|
T104 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T102 |
36 |
|
T103 |
50 |
|
T104 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1679 |
1 |
|
|
T102 |
33 |
|
T103 |
49 |
|
T104 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T102 |
29 |
|
T103 |
19 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1671 |
1 |
|
|
T102 |
36 |
|
T103 |
50 |
|
T104 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T102 |
32 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T102 |
36 |
|
T103 |
50 |
|
T104 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
830 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T102 |
32 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T102 |
36 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
830 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T102 |
31 |
|
T103 |
47 |
|
T104 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1580 |
1 |
|
|
T102 |
36 |
|
T103 |
46 |
|
T104 |
36 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T102 |
31 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
836 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T102 |
35 |
|
T103 |
46 |
|
T104 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
827 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T102 |
29 |
|
T103 |
45 |
|
T104 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T102 |
34 |
|
T103 |
45 |
|
T104 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T102 |
28 |
|
T103 |
45 |
|
T104 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T102 |
34 |
|
T103 |
45 |
|
T104 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
18 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T102 |
28 |
|
T103 |
45 |
|
T104 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T102 |
32 |
|
T103 |
43 |
|
T104 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T102 |
27 |
|
T103 |
43 |
|
T104 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T102 |
32 |
|
T103 |
42 |
|
T104 |
30 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T102 |
27 |
|
T103 |
43 |
|
T104 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
832 |
1 |
|
|
T102 |
28 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T102 |
31 |
|
T103 |
41 |
|
T104 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
27 |
|
T103 |
28 |
|
T104 |
17 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T102 |
26 |
|
T103 |
42 |
|
T104 |
33 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64420 |
1 |
|
|
T102 |
1356 |
|
T103 |
1571 |
|
T104 |
907 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52621 |
1 |
|
|
T102 |
1114 |
|
T103 |
1209 |
|
T104 |
1748 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63201 |
1 |
|
|
T102 |
2159 |
|
T103 |
1085 |
|
T104 |
1007 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47780 |
1 |
|
|
T102 |
1116 |
|
T103 |
2201 |
|
T104 |
860 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1853 |
1 |
|
|
T102 |
53 |
|
T103 |
59 |
|
T104 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1886 |
1 |
|
|
T102 |
48 |
|
T103 |
59 |
|
T104 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1823 |
1 |
|
|
T102 |
52 |
|
T103 |
56 |
|
T104 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1860 |
1 |
|
|
T102 |
48 |
|
T103 |
59 |
|
T104 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1780 |
1 |
|
|
T102 |
51 |
|
T103 |
56 |
|
T104 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1820 |
1 |
|
|
T102 |
48 |
|
T103 |
57 |
|
T104 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T102 |
50 |
|
T103 |
55 |
|
T104 |
44 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
780 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1790 |
1 |
|
|
T102 |
48 |
|
T103 |
54 |
|
T104 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1703 |
1 |
|
|
T102 |
48 |
|
T103 |
53 |
|
T104 |
43 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T102 |
46 |
|
T103 |
54 |
|
T104 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
20 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T102 |
46 |
|
T103 |
52 |
|
T104 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1712 |
1 |
|
|
T102 |
45 |
|
T103 |
50 |
|
T104 |
39 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1634 |
1 |
|
|
T102 |
46 |
|
T103 |
52 |
|
T104 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T102 |
45 |
|
T103 |
48 |
|
T104 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
812 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T102 |
45 |
|
T103 |
51 |
|
T104 |
42 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T102 |
45 |
|
T103 |
50 |
|
T104 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T102 |
44 |
|
T103 |
50 |
|
T104 |
41 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T102 |
41 |
|
T103 |
45 |
|
T104 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T102 |
43 |
|
T103 |
49 |
|
T104 |
40 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T102 |
41 |
|
T103 |
43 |
|
T104 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T102 |
41 |
|
T103 |
42 |
|
T104 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T102 |
41 |
|
T103 |
46 |
|
T104 |
38 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T102 |
41 |
|
T103 |
41 |
|
T104 |
32 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T102 |
41 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T102 |
40 |
|
T103 |
40 |
|
T104 |
30 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T102 |
40 |
|
T103 |
46 |
|
T104 |
35 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T102 |
39 |
|
T103 |
39 |
|
T104 |
28 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60739 |
1 |
|
|
T102 |
1239 |
|
T103 |
2263 |
|
T104 |
1166 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48604 |
1 |
|
|
T102 |
1012 |
|
T103 |
1152 |
|
T104 |
1440 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66760 |
1 |
|
|
T102 |
1285 |
|
T103 |
1782 |
|
T104 |
1121 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52076 |
1 |
|
|
T102 |
2147 |
|
T103 |
1202 |
|
T104 |
934 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1823 |
1 |
|
|
T102 |
61 |
|
T103 |
39 |
|
T104 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1846 |
1 |
|
|
T102 |
57 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1786 |
1 |
|
|
T102 |
60 |
|
T103 |
39 |
|
T104 |
38 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1807 |
1 |
|
|
T102 |
57 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1755 |
1 |
|
|
T102 |
60 |
|
T103 |
38 |
|
T104 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1776 |
1 |
|
|
T102 |
55 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T102 |
58 |
|
T103 |
38 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T102 |
51 |
|
T103 |
43 |
|
T104 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T102 |
57 |
|
T103 |
37 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1711 |
1 |
|
|
T102 |
51 |
|
T103 |
43 |
|
T104 |
37 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T102 |
16 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T102 |
56 |
|
T103 |
37 |
|
T104 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T102 |
51 |
|
T103 |
42 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1622 |
1 |
|
|
T102 |
52 |
|
T103 |
35 |
|
T104 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T102 |
51 |
|
T103 |
42 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T102 |
52 |
|
T103 |
34 |
|
T104 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T102 |
50 |
|
T103 |
41 |
|
T104 |
35 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T102 |
52 |
|
T103 |
34 |
|
T104 |
33 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T102 |
50 |
|
T103 |
41 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T102 |
52 |
|
T103 |
34 |
|
T104 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T102 |
47 |
|
T103 |
40 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T102 |
49 |
|
T103 |
34 |
|
T104 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T102 |
47 |
|
T103 |
39 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T102 |
47 |
|
T103 |
32 |
|
T104 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T102 |
47 |
|
T103 |
39 |
|
T104 |
36 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T102 |
46 |
|
T103 |
31 |
|
T104 |
31 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1425 |
1 |
|
|
T102 |
47 |
|
T103 |
39 |
|
T104 |
34 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T102 |
44 |
|
T103 |
31 |
|
T104 |
28 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T102 |
46 |
|
T103 |
38 |
|
T104 |
32 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
25 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T102 |
43 |
|
T103 |
31 |
|
T104 |
27 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
20 |
|
T103 |
18 |
|
T104 |
13 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T102 |
44 |
|
T103 |
37 |
|
T104 |
32 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61102 |
1 |
|
|
T102 |
1520 |
|
T103 |
1537 |
|
T104 |
1111 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
56095 |
1 |
|
|
T102 |
1879 |
|
T103 |
1329 |
|
T104 |
1635 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57655 |
1 |
|
|
T102 |
1519 |
|
T103 |
2147 |
|
T104 |
1295 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53194 |
1 |
|
|
T102 |
931 |
|
T103 |
1082 |
|
T104 |
756 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1910 |
1 |
|
|
T102 |
51 |
|
T103 |
58 |
|
T104 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1910 |
1 |
|
|
T102 |
48 |
|
T103 |
54 |
|
T104 |
33 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
772 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1872 |
1 |
|
|
T102 |
51 |
|
T103 |
56 |
|
T104 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1866 |
1 |
|
|
T102 |
47 |
|
T103 |
51 |
|
T104 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1846 |
1 |
|
|
T102 |
51 |
|
T103 |
55 |
|
T104 |
34 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1841 |
1 |
|
|
T102 |
45 |
|
T103 |
50 |
|
T104 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
771 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1812 |
1 |
|
|
T102 |
51 |
|
T103 |
55 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
759 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T102 |
44 |
|
T103 |
49 |
|
T104 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1783 |
1 |
|
|
T102 |
51 |
|
T103 |
53 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1775 |
1 |
|
|
T102 |
42 |
|
T103 |
48 |
|
T104 |
29 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1741 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T102 |
40 |
|
T103 |
47 |
|
T104 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1706 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T102 |
38 |
|
T103 |
46 |
|
T104 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
759 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1672 |
1 |
|
|
T102 |
49 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1645 |
1 |
|
|
T102 |
37 |
|
T103 |
45 |
|
T104 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1632 |
1 |
|
|
T102 |
49 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1611 |
1 |
|
|
T102 |
36 |
|
T103 |
43 |
|
T104 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
755 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T102 |
49 |
|
T103 |
52 |
|
T104 |
31 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T102 |
36 |
|
T103 |
41 |
|
T104 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T102 |
48 |
|
T103 |
51 |
|
T104 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T102 |
35 |
|
T103 |
39 |
|
T104 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T102 |
47 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T102 |
34 |
|
T103 |
38 |
|
T104 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T102 |
47 |
|
T103 |
47 |
|
T104 |
27 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T102 |
33 |
|
T103 |
37 |
|
T104 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1434 |
1 |
|
|
T102 |
46 |
|
T103 |
44 |
|
T104 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T102 |
32 |
|
T103 |
36 |
|
T104 |
25 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1397 |
1 |
|
|
T102 |
46 |
|
T103 |
44 |
|
T104 |
26 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T102 |
31 |
|
T103 |
35 |
|
T104 |
25 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62242 |
1 |
|
|
T102 |
1927 |
|
T103 |
1930 |
|
T104 |
1863 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46378 |
1 |
|
|
T102 |
736 |
|
T103 |
825 |
|
T104 |
877 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66052 |
1 |
|
|
T102 |
1555 |
|
T103 |
1442 |
|
T104 |
794 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51942 |
1 |
|
|
T102 |
1657 |
|
T103 |
2111 |
|
T104 |
1078 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1924 |
1 |
|
|
T102 |
39 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1916 |
1 |
|
|
T102 |
44 |
|
T103 |
48 |
|
T104 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1882 |
1 |
|
|
T102 |
36 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1875 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
41 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1853 |
1 |
|
|
T102 |
35 |
|
T103 |
48 |
|
T104 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1838 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1803 |
1 |
|
|
T102 |
35 |
|
T103 |
47 |
|
T104 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
817 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1810 |
1 |
|
|
T102 |
43 |
|
T103 |
46 |
|
T104 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T102 |
35 |
|
T103 |
45 |
|
T104 |
32 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1783 |
1 |
|
|
T102 |
43 |
|
T103 |
45 |
|
T104 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
806 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1728 |
1 |
|
|
T102 |
35 |
|
T103 |
42 |
|
T104 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T102 |
42 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T102 |
35 |
|
T103 |
40 |
|
T104 |
31 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T102 |
42 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T102 |
34 |
|
T103 |
40 |
|
T104 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T102 |
41 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T102 |
34 |
|
T103 |
40 |
|
T104 |
30 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T102 |
40 |
|
T103 |
44 |
|
T104 |
38 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T102 |
33 |
|
T103 |
38 |
|
T104 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T102 |
39 |
|
T103 |
43 |
|
T104 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T102 |
32 |
|
T103 |
36 |
|
T104 |
29 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T102 |
39 |
|
T103 |
41 |
|
T104 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T102 |
32 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T102 |
39 |
|
T103 |
41 |
|
T104 |
35 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T102 |
32 |
|
T103 |
31 |
|
T104 |
27 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T102 |
37 |
|
T103 |
41 |
|
T104 |
34 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T102 |
32 |
|
T103 |
30 |
|
T104 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T102 |
35 |
|
T103 |
41 |
|
T104 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
28 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T102 |
32 |
|
T103 |
30 |
|
T104 |
26 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T102 |
33 |
|
T103 |
37 |
|
T104 |
33 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57791 |
1 |
|
|
T102 |
1031 |
|
T103 |
1507 |
|
T104 |
1719 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50827 |
1 |
|
|
T102 |
1523 |
|
T103 |
1028 |
|
T104 |
789 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61889 |
1 |
|
|
T102 |
1119 |
|
T103 |
1459 |
|
T104 |
1386 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
56237 |
1 |
|
|
T102 |
1967 |
|
T103 |
2094 |
|
T104 |
750 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1908 |
1 |
|
|
T102 |
64 |
|
T103 |
50 |
|
T104 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1922 |
1 |
|
|
T102 |
60 |
|
T103 |
56 |
|
T104 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1873 |
1 |
|
|
T102 |
64 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1881 |
1 |
|
|
T102 |
59 |
|
T103 |
56 |
|
T104 |
37 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1842 |
1 |
|
|
T102 |
64 |
|
T103 |
47 |
|
T104 |
35 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1839 |
1 |
|
|
T102 |
57 |
|
T103 |
54 |
|
T104 |
36 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
817 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1811 |
1 |
|
|
T102 |
64 |
|
T103 |
45 |
|
T104 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1798 |
1 |
|
|
T102 |
55 |
|
T103 |
53 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1773 |
1 |
|
|
T102 |
60 |
|
T103 |
45 |
|
T104 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1761 |
1 |
|
|
T102 |
52 |
|
T103 |
52 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
15 |
|
T103 |
27 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1744 |
1 |
|
|
T102 |
60 |
|
T103 |
44 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T102 |
51 |
|
T103 |
51 |
|
T104 |
31 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T102 |
58 |
|
T103 |
42 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1681 |
1 |
|
|
T102 |
49 |
|
T103 |
51 |
|
T104 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T102 |
58 |
|
T103 |
42 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T102 |
49 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T102 |
58 |
|
T103 |
42 |
|
T104 |
33 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1597 |
1 |
|
|
T102 |
47 |
|
T103 |
49 |
|
T104 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T102 |
56 |
|
T103 |
42 |
|
T104 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
795 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1561 |
1 |
|
|
T102 |
47 |
|
T103 |
48 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1552 |
1 |
|
|
T102 |
54 |
|
T103 |
42 |
|
T104 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T102 |
46 |
|
T103 |
48 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T102 |
52 |
|
T103 |
38 |
|
T104 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T102 |
46 |
|
T103 |
47 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T102 |
51 |
|
T103 |
38 |
|
T104 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T102 |
43 |
|
T103 |
46 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T102 |
51 |
|
T103 |
36 |
|
T104 |
29 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T102 |
39 |
|
T103 |
46 |
|
T104 |
28 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
15 |
|
T103 |
26 |
|
T104 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T102 |
51 |
|
T103 |
36 |
|
T104 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T102 |
39 |
|
T103 |
44 |
|
T104 |
26 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61748 |
1 |
|
|
T102 |
1680 |
|
T103 |
1765 |
|
T104 |
1340 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52170 |
1 |
|
|
T102 |
741 |
|
T103 |
1735 |
|
T104 |
826 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61618 |
1 |
|
|
T102 |
1871 |
|
T103 |
1416 |
|
T104 |
1046 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52310 |
1 |
|
|
T102 |
1678 |
|
T103 |
1395 |
|
T104 |
1477 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1907 |
1 |
|
|
T102 |
43 |
|
T103 |
49 |
|
T104 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1917 |
1 |
|
|
T102 |
44 |
|
T103 |
52 |
|
T104 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1873 |
1 |
|
|
T102 |
43 |
|
T103 |
48 |
|
T104 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1872 |
1 |
|
|
T102 |
43 |
|
T103 |
51 |
|
T104 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1842 |
1 |
|
|
T102 |
43 |
|
T103 |
46 |
|
T104 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1837 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1814 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1790 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1763 |
1 |
|
|
T102 |
40 |
|
T103 |
46 |
|
T104 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T102 |
38 |
|
T103 |
49 |
|
T104 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1719 |
1 |
|
|
T102 |
38 |
|
T103 |
45 |
|
T104 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
776 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1719 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
31 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1686 |
1 |
|
|
T102 |
37 |
|
T103 |
43 |
|
T104 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T102 |
37 |
|
T103 |
47 |
|
T104 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T102 |
35 |
|
T103 |
40 |
|
T104 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
17 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1640 |
1 |
|
|
T102 |
35 |
|
T103 |
44 |
|
T104 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T102 |
34 |
|
T103 |
39 |
|
T104 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T102 |
35 |
|
T103 |
43 |
|
T104 |
30 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T102 |
33 |
|
T103 |
38 |
|
T104 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
768 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T102 |
35 |
|
T103 |
43 |
|
T104 |
28 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T102 |
33 |
|
T103 |
35 |
|
T104 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T102 |
33 |
|
T103 |
42 |
|
T104 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T102 |
31 |
|
T103 |
35 |
|
T104 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T102 |
32 |
|
T103 |
41 |
|
T104 |
27 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T102 |
30 |
|
T103 |
34 |
|
T104 |
24 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1450 |
1 |
|
|
T102 |
31 |
|
T103 |
40 |
|
T104 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T102 |
28 |
|
T103 |
32 |
|
T104 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T102 |
31 |
|
T103 |
40 |
|
T104 |
25 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
21 |
|
T104 |
19 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T102 |
28 |
|
T103 |
31 |
|
T104 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
765 |
1 |
|
|
T102 |
23 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T102 |
31 |
|
T103 |
40 |
|
T104 |
25 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59165 |
1 |
|
|
T102 |
1465 |
|
T103 |
1545 |
|
T104 |
861 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48100 |
1 |
|
|
T102 |
1056 |
|
T103 |
2001 |
|
T104 |
850 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61143 |
1 |
|
|
T102 |
1468 |
|
T103 |
1305 |
|
T104 |
1811 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
58648 |
1 |
|
|
T102 |
1782 |
|
T103 |
1397 |
|
T104 |
1027 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1925 |
1 |
|
|
T102 |
54 |
|
T103 |
54 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1935 |
1 |
|
|
T102 |
52 |
|
T103 |
52 |
|
T104 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1895 |
1 |
|
|
T102 |
53 |
|
T103 |
52 |
|
T104 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1901 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1854 |
1 |
|
|
T102 |
51 |
|
T103 |
50 |
|
T104 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1864 |
1 |
|
|
T102 |
48 |
|
T103 |
50 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1813 |
1 |
|
|
T102 |
48 |
|
T103 |
50 |
|
T104 |
36 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1818 |
1 |
|
|
T102 |
47 |
|
T103 |
49 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T102 |
45 |
|
T103 |
48 |
|
T104 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T102 |
47 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T102 |
41 |
|
T103 |
48 |
|
T104 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
786 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1743 |
1 |
|
|
T102 |
47 |
|
T103 |
46 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T102 |
40 |
|
T103 |
47 |
|
T104 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1705 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
784 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1655 |
1 |
|
|
T102 |
40 |
|
T103 |
45 |
|
T104 |
33 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1653 |
1 |
|
|
T102 |
45 |
|
T103 |
44 |
|
T104 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T102 |
38 |
|
T103 |
45 |
|
T104 |
32 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T102 |
44 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T102 |
36 |
|
T103 |
44 |
|
T104 |
31 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T102 |
43 |
|
T103 |
41 |
|
T104 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1547 |
1 |
|
|
T102 |
36 |
|
T103 |
44 |
|
T104 |
30 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T102 |
42 |
|
T103 |
41 |
|
T104 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T102 |
36 |
|
T103 |
41 |
|
T104 |
29 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
777 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T102 |
41 |
|
T103 |
41 |
|
T104 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T102 |
34 |
|
T103 |
40 |
|
T104 |
28 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T102 |
41 |
|
T103 |
40 |
|
T104 |
37 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T102 |
33 |
|
T103 |
39 |
|
T104 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T102 |
41 |
|
T103 |
39 |
|
T104 |
35 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
777 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T102 |
33 |
|
T103 |
38 |
|
T104 |
26 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T102 |
24 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1420 |
1 |
|
|
T102 |
41 |
|
T103 |
39 |
|
T104 |
35 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63362 |
1 |
|
|
T102 |
1751 |
|
T103 |
2475 |
|
T104 |
1822 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48225 |
1 |
|
|
T102 |
1434 |
|
T103 |
889 |
|
T104 |
697 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
67487 |
1 |
|
|
T102 |
1084 |
|
T103 |
2019 |
|
T104 |
1173 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48698 |
1 |
|
|
T102 |
1249 |
|
T103 |
932 |
|
T104 |
847 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1891 |
1 |
|
|
T102 |
63 |
|
T103 |
40 |
|
T104 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1914 |
1 |
|
|
T102 |
68 |
|
T103 |
38 |
|
T104 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1856 |
1 |
|
|
T102 |
62 |
|
T103 |
40 |
|
T104 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
771 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1881 |
1 |
|
|
T102 |
68 |
|
T103 |
38 |
|
T104 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1821 |
1 |
|
|
T102 |
62 |
|
T103 |
38 |
|
T104 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T102 |
67 |
|
T103 |
37 |
|
T104 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1779 |
1 |
|
|
T102 |
61 |
|
T103 |
37 |
|
T104 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1812 |
1 |
|
|
T102 |
65 |
|
T103 |
37 |
|
T104 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T102 |
60 |
|
T103 |
36 |
|
T104 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T102 |
64 |
|
T103 |
37 |
|
T104 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
20 |
|
T103 |
27 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1708 |
1 |
|
|
T102 |
60 |
|
T103 |
36 |
|
T104 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1740 |
1 |
|
|
T102 |
63 |
|
T103 |
36 |
|
T104 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T102 |
58 |
|
T103 |
35 |
|
T104 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1688 |
1 |
|
|
T102 |
61 |
|
T103 |
36 |
|
T104 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
787 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1644 |
1 |
|
|
T102 |
57 |
|
T103 |
35 |
|
T104 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
763 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
15 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T102 |
59 |
|
T103 |
36 |
|
T104 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T102 |
56 |
|
T103 |
35 |
|
T104 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T102 |
56 |
|
T103 |
35 |
|
T104 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T102 |
56 |
|
T103 |
35 |
|
T104 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1569 |
1 |
|
|
T102 |
54 |
|
T103 |
35 |
|
T104 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1540 |
1 |
|
|
T102 |
55 |
|
T103 |
35 |
|
T104 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T102 |
53 |
|
T103 |
34 |
|
T104 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T102 |
51 |
|
T103 |
35 |
|
T104 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T102 |
52 |
|
T103 |
32 |
|
T104 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T102 |
48 |
|
T103 |
33 |
|
T104 |
30 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1459 |
1 |
|
|
T102 |
52 |
|
T103 |
32 |
|
T104 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T102 |
47 |
|
T103 |
31 |
|
T104 |
29 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T102 |
52 |
|
T103 |
31 |
|
T104 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
782 |
1 |
|
|
T102 |
20 |
|
T103 |
26 |
|
T104 |
21 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T102 |
46 |
|
T103 |
31 |
|
T104 |
28 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
14 |
|
T103 |
28 |
|
T104 |
14 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T102 |
50 |
|
T103 |
30 |
|
T104 |
33 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66921 |
1 |
|
|
T102 |
1084 |
|
T103 |
1457 |
|
T104 |
722 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55394 |
1 |
|
|
T102 |
1341 |
|
T103 |
2095 |
|
T104 |
1084 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55364 |
1 |
|
|
T102 |
1347 |
|
T103 |
1511 |
|
T104 |
1096 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50547 |
1 |
|
|
T102 |
1979 |
|
T103 |
1178 |
|
T104 |
1588 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1858 |
1 |
|
|
T102 |
57 |
|
T103 |
48 |
|
T104 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T102 |
60 |
|
T103 |
46 |
|
T104 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1817 |
1 |
|
|
T102 |
57 |
|
T103 |
48 |
|
T104 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1815 |
1 |
|
|
T102 |
58 |
|
T103 |
45 |
|
T104 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1788 |
1 |
|
|
T102 |
54 |
|
T103 |
48 |
|
T104 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1772 |
1 |
|
|
T102 |
56 |
|
T103 |
43 |
|
T104 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1751 |
1 |
|
|
T102 |
53 |
|
T103 |
48 |
|
T104 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1736 |
1 |
|
|
T102 |
53 |
|
T103 |
43 |
|
T104 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T102 |
51 |
|
T103 |
47 |
|
T104 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1694 |
1 |
|
|
T102 |
53 |
|
T103 |
40 |
|
T104 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T102 |
50 |
|
T103 |
46 |
|
T104 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T102 |
51 |
|
T103 |
39 |
|
T104 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T102 |
49 |
|
T103 |
45 |
|
T104 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T102 |
50 |
|
T103 |
38 |
|
T104 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T102 |
48 |
|
T103 |
45 |
|
T104 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
16 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T102 |
49 |
|
T103 |
36 |
|
T104 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T102 |
48 |
|
T103 |
44 |
|
T104 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T102 |
47 |
|
T103 |
36 |
|
T104 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T102 |
47 |
|
T103 |
44 |
|
T104 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T102 |
47 |
|
T103 |
35 |
|
T104 |
37 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T102 |
47 |
|
T103 |
43 |
|
T104 |
38 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T102 |
47 |
|
T103 |
35 |
|
T104 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T102 |
46 |
|
T103 |
43 |
|
T104 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T102 |
46 |
|
T103 |
35 |
|
T104 |
35 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1449 |
1 |
|
|
T102 |
46 |
|
T103 |
43 |
|
T104 |
36 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T102 |
43 |
|
T103 |
32 |
|
T104 |
33 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T102 |
45 |
|
T103 |
41 |
|
T104 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T102 |
43 |
|
T103 |
32 |
|
T104 |
32 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
13 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T102 |
44 |
|
T103 |
41 |
|
T104 |
34 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
16 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T102 |
42 |
|
T103 |
32 |
|
T104 |
32 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
64269 |
1 |
|
|
T102 |
1547 |
|
T103 |
1287 |
|
T104 |
711 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47786 |
1 |
|
|
T102 |
817 |
|
T103 |
1191 |
|
T104 |
962 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59746 |
1 |
|
|
T102 |
2425 |
|
T103 |
2586 |
|
T104 |
1792 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
55446 |
1 |
|
|
T102 |
918 |
|
T103 |
943 |
|
T104 |
1122 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1886 |
1 |
|
|
T102 |
40 |
|
T103 |
55 |
|
T104 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1869 |
1 |
|
|
T102 |
46 |
|
T103 |
55 |
|
T104 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1852 |
1 |
|
|
T102 |
38 |
|
T103 |
55 |
|
T104 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
829 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1841 |
1 |
|
|
T102 |
46 |
|
T103 |
55 |
|
T104 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1823 |
1 |
|
|
T102 |
38 |
|
T103 |
55 |
|
T104 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1803 |
1 |
|
|
T102 |
46 |
|
T103 |
53 |
|
T104 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1790 |
1 |
|
|
T102 |
38 |
|
T103 |
55 |
|
T104 |
43 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
828 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1767 |
1 |
|
|
T102 |
46 |
|
T103 |
53 |
|
T104 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T102 |
37 |
|
T103 |
54 |
|
T104 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T102 |
45 |
|
T103 |
53 |
|
T104 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1716 |
1 |
|
|
T102 |
36 |
|
T103 |
54 |
|
T104 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
826 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T102 |
45 |
|
T103 |
50 |
|
T104 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T102 |
34 |
|
T103 |
51 |
|
T104 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T102 |
33 |
|
T103 |
50 |
|
T104 |
41 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
16 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T102 |
43 |
|
T103 |
45 |
|
T104 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T102 |
30 |
|
T103 |
48 |
|
T104 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T102 |
41 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T102 |
29 |
|
T103 |
47 |
|
T104 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T102 |
40 |
|
T103 |
41 |
|
T104 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T102 |
28 |
|
T103 |
47 |
|
T104 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T102 |
40 |
|
T103 |
41 |
|
T104 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T102 |
28 |
|
T103 |
46 |
|
T104 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T102 |
39 |
|
T103 |
39 |
|
T104 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T102 |
25 |
|
T103 |
42 |
|
T104 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T102 |
39 |
|
T103 |
39 |
|
T104 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T102 |
24 |
|
T103 |
41 |
|
T104 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T102 |
39 |
|
T103 |
38 |
|
T104 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
34 |
|
T103 |
25 |
|
T104 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T102 |
23 |
|
T103 |
40 |
|
T104 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
28 |
|
T103 |
25 |
|
T104 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T102 |
38 |
|
T103 |
37 |
|
T104 |
32 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60855 |
1 |
|
|
T102 |
1327 |
|
T103 |
2171 |
|
T104 |
1686 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53911 |
1 |
|
|
T102 |
997 |
|
T103 |
1084 |
|
T104 |
935 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62490 |
1 |
|
|
T102 |
1975 |
|
T103 |
1694 |
|
T104 |
1241 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49992 |
1 |
|
|
T102 |
1329 |
|
T103 |
1060 |
|
T104 |
670 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1834 |
1 |
|
|
T102 |
51 |
|
T103 |
60 |
|
T104 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
842 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1839 |
1 |
|
|
T102 |
51 |
|
T103 |
54 |
|
T104 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1807 |
1 |
|
|
T102 |
51 |
|
T103 |
58 |
|
T104 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
842 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1793 |
1 |
|
|
T102 |
51 |
|
T103 |
54 |
|
T104 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1776 |
1 |
|
|
T102 |
49 |
|
T103 |
58 |
|
T104 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1760 |
1 |
|
|
T102 |
51 |
|
T103 |
52 |
|
T104 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
853 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T102 |
47 |
|
T103 |
57 |
|
T104 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
841 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T102 |
50 |
|
T103 |
51 |
|
T104 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
850 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T102 |
47 |
|
T103 |
55 |
|
T104 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
840 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1698 |
1 |
|
|
T102 |
50 |
|
T103 |
51 |
|
T104 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
850 |
1 |
|
|
T102 |
25 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T102 |
47 |
|
T103 |
55 |
|
T104 |
41 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
840 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1668 |
1 |
|
|
T102 |
50 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
844 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1648 |
1 |
|
|
T102 |
46 |
|
T103 |
53 |
|
T104 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T102 |
50 |
|
T103 |
47 |
|
T104 |
36 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
844 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T102 |
44 |
|
T103 |
51 |
|
T104 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
836 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T102 |
49 |
|
T103 |
46 |
|
T104 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T102 |
43 |
|
T103 |
50 |
|
T104 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T102 |
49 |
|
T103 |
41 |
|
T104 |
33 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T102 |
41 |
|
T103 |
50 |
|
T104 |
39 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T102 |
49 |
|
T103 |
39 |
|
T104 |
32 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T102 |
39 |
|
T103 |
48 |
|
T104 |
38 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T102 |
49 |
|
T103 |
38 |
|
T104 |
31 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T102 |
37 |
|
T103 |
48 |
|
T104 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
832 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T102 |
49 |
|
T103 |
37 |
|
T104 |
30 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T102 |
36 |
|
T103 |
47 |
|
T104 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T102 |
48 |
|
T103 |
35 |
|
T104 |
29 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T102 |
36 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1386 |
1 |
|
|
T102 |
46 |
|
T103 |
35 |
|
T104 |
27 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
24 |
|
T103 |
22 |
|
T104 |
15 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T102 |
34 |
|
T103 |
44 |
|
T104 |
35 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
25 |
|
T103 |
27 |
|
T104 |
16 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1344 |
1 |
|
|
T102 |
45 |
|
T103 |
35 |
|
T104 |
26 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58111 |
1 |
|
|
T102 |
1543 |
|
T103 |
1551 |
|
T104 |
665 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53971 |
1 |
|
|
T102 |
1867 |
|
T103 |
1100 |
|
T104 |
1482 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56505 |
1 |
|
|
T102 |
1041 |
|
T103 |
1510 |
|
T104 |
1166 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
57411 |
1 |
|
|
T102 |
1242 |
|
T103 |
1964 |
|
T104 |
1251 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1988 |
1 |
|
|
T102 |
56 |
|
T103 |
53 |
|
T104 |
50 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
2002 |
1 |
|
|
T102 |
54 |
|
T103 |
55 |
|
T104 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1946 |
1 |
|
|
T102 |
56 |
|
T103 |
52 |
|
T104 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1964 |
1 |
|
|
T102 |
53 |
|
T103 |
55 |
|
T104 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1918 |
1 |
|
|
T102 |
56 |
|
T103 |
49 |
|
T104 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1936 |
1 |
|
|
T102 |
52 |
|
T103 |
53 |
|
T104 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1886 |
1 |
|
|
T102 |
55 |
|
T103 |
48 |
|
T104 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1903 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
48 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1855 |
1 |
|
|
T102 |
55 |
|
T103 |
46 |
|
T104 |
44 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1867 |
1 |
|
|
T102 |
49 |
|
T103 |
52 |
|
T104 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1811 |
1 |
|
|
T102 |
55 |
|
T103 |
46 |
|
T104 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1831 |
1 |
|
|
T102 |
49 |
|
T103 |
50 |
|
T104 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1780 |
1 |
|
|
T102 |
54 |
|
T103 |
45 |
|
T104 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T102 |
47 |
|
T103 |
49 |
|
T104 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1737 |
1 |
|
|
T102 |
54 |
|
T103 |
43 |
|
T104 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1745 |
1 |
|
|
T102 |
45 |
|
T103 |
49 |
|
T104 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T102 |
54 |
|
T103 |
41 |
|
T104 |
42 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T102 |
44 |
|
T103 |
49 |
|
T104 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T102 |
54 |
|
T103 |
37 |
|
T104 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T102 |
44 |
|
T103 |
47 |
|
T104 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T102 |
54 |
|
T103 |
36 |
|
T104 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T102 |
53 |
|
T103 |
36 |
|
T104 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1585 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T102 |
50 |
|
T103 |
36 |
|
T104 |
35 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T102 |
40 |
|
T103 |
45 |
|
T104 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T102 |
49 |
|
T103 |
35 |
|
T104 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T102 |
37 |
|
T103 |
45 |
|
T104 |
38 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
746 |
1 |
|
|
T102 |
18 |
|
T103 |
24 |
|
T104 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T102 |
45 |
|
T103 |
33 |
|
T104 |
34 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T102 |
20 |
|
T103 |
22 |
|
T104 |
9 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T102 |
37 |
|
T103 |
43 |
|
T104 |
38 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62674 |
1 |
|
|
T102 |
2460 |
|
T103 |
1784 |
|
T104 |
839 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46285 |
1 |
|
|
T102 |
929 |
|
T103 |
1996 |
|
T104 |
910 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
67183 |
1 |
|
|
T102 |
1549 |
|
T103 |
1258 |
|
T104 |
1068 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52160 |
1 |
|
|
T102 |
817 |
|
T103 |
1123 |
|
T104 |
1593 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1829 |
1 |
|
|
T102 |
48 |
|
T103 |
58 |
|
T104 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
837 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1827 |
1 |
|
|
T102 |
47 |
|
T103 |
58 |
|
T104 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1791 |
1 |
|
|
T102 |
46 |
|
T103 |
58 |
|
T104 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
837 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1792 |
1 |
|
|
T102 |
46 |
|
T103 |
56 |
|
T104 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1757 |
1 |
|
|
T102 |
46 |
|
T103 |
57 |
|
T104 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1764 |
1 |
|
|
T102 |
44 |
|
T103 |
55 |
|
T104 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T102 |
44 |
|
T103 |
57 |
|
T104 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
835 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1724 |
1 |
|
|
T102 |
42 |
|
T103 |
51 |
|
T104 |
44 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
834 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1702 |
1 |
|
|
T102 |
42 |
|
T103 |
56 |
|
T104 |
43 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T102 |
41 |
|
T103 |
49 |
|
T104 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
834 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T102 |
41 |
|
T103 |
54 |
|
T104 |
42 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
833 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1639 |
1 |
|
|
T102 |
41 |
|
T103 |
48 |
|
T104 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1629 |
1 |
|
|
T102 |
39 |
|
T103 |
51 |
|
T104 |
41 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T102 |
39 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1595 |
1 |
|
|
T102 |
39 |
|
T103 |
50 |
|
T104 |
40 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
825 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T102 |
39 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T102 |
39 |
|
T103 |
48 |
|
T104 |
38 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T102 |
39 |
|
T103 |
45 |
|
T104 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
819 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T102 |
38 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
823 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T102 |
39 |
|
T103 |
45 |
|
T104 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T102 |
37 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T102 |
36 |
|
T103 |
42 |
|
T104 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T102 |
36 |
|
T103 |
43 |
|
T104 |
37 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T102 |
35 |
|
T103 |
41 |
|
T104 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T102 |
36 |
|
T103 |
43 |
|
T104 |
36 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T102 |
35 |
|
T103 |
40 |
|
T104 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T102 |
35 |
|
T103 |
39 |
|
T104 |
34 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T102 |
33 |
|
T103 |
39 |
|
T104 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
818 |
1 |
|
|
T102 |
27 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T102 |
35 |
|
T103 |
38 |
|
T104 |
33 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
27 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T102 |
32 |
|
T103 |
39 |
|
T104 |
31 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59796 |
1 |
|
|
T102 |
1108 |
|
T103 |
1142 |
|
T104 |
865 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
51582 |
1 |
|
|
T102 |
1254 |
|
T103 |
2197 |
|
T104 |
995 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62493 |
1 |
|
|
T102 |
2083 |
|
T103 |
1140 |
|
T104 |
1480 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
53461 |
1 |
|
|
T102 |
1341 |
|
T103 |
1471 |
|
T104 |
1150 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1883 |
1 |
|
|
T102 |
56 |
|
T103 |
60 |
|
T104 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1892 |
1 |
|
|
T102 |
58 |
|
T103 |
66 |
|
T104 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1851 |
1 |
|
|
T102 |
53 |
|
T103 |
59 |
|
T104 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
802 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1859 |
1 |
|
|
T102 |
55 |
|
T103 |
66 |
|
T104 |
48 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1805 |
1 |
|
|
T102 |
52 |
|
T103 |
58 |
|
T104 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1818 |
1 |
|
|
T102 |
54 |
|
T103 |
66 |
|
T104 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T102 |
52 |
|
T103 |
58 |
|
T104 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1788 |
1 |
|
|
T102 |
54 |
|
T103 |
65 |
|
T104 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1742 |
1 |
|
|
T102 |
51 |
|
T103 |
57 |
|
T104 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T102 |
54 |
|
T103 |
62 |
|
T104 |
47 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
18 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T102 |
50 |
|
T103 |
57 |
|
T104 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1723 |
1 |
|
|
T102 |
53 |
|
T103 |
62 |
|
T104 |
44 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T102 |
48 |
|
T103 |
57 |
|
T104 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T102 |
52 |
|
T103 |
61 |
|
T104 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T102 |
47 |
|
T103 |
57 |
|
T104 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T102 |
50 |
|
T103 |
58 |
|
T104 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T102 |
45 |
|
T103 |
54 |
|
T104 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1609 |
1 |
|
|
T102 |
50 |
|
T103 |
56 |
|
T104 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T102 |
44 |
|
T103 |
53 |
|
T104 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T102 |
48 |
|
T103 |
55 |
|
T104 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T102 |
43 |
|
T103 |
51 |
|
T104 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T102 |
48 |
|
T103 |
54 |
|
T104 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T102 |
43 |
|
T103 |
50 |
|
T104 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T102 |
48 |
|
T103 |
51 |
|
T104 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T102 |
42 |
|
T103 |
50 |
|
T104 |
34 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T102 |
46 |
|
T103 |
49 |
|
T104 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T102 |
41 |
|
T103 |
50 |
|
T104 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T102 |
45 |
|
T103 |
46 |
|
T104 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1371 |
1 |
|
|
T102 |
40 |
|
T103 |
49 |
|
T104 |
30 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
788 |
1 |
|
|
T102 |
16 |
|
T103 |
15 |
|
T104 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T102 |
45 |
|
T103 |
45 |
|
T104 |
38 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65191 |
1 |
|
|
T102 |
1801 |
|
T103 |
2169 |
|
T104 |
1388 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48156 |
1 |
|
|
T102 |
1112 |
|
T103 |
1175 |
|
T104 |
628 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
67348 |
1 |
|
|
T102 |
1966 |
|
T103 |
1495 |
|
T104 |
1597 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48138 |
1 |
|
|
T102 |
1009 |
|
T103 |
1329 |
|
T104 |
1021 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1792 |
1 |
|
|
T102 |
42 |
|
T103 |
54 |
|
T104 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1813 |
1 |
|
|
T102 |
46 |
|
T103 |
57 |
|
T104 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
847 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1761 |
1 |
|
|
T102 |
41 |
|
T103 |
54 |
|
T104 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T102 |
45 |
|
T103 |
56 |
|
T104 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T102 |
40 |
|
T103 |
51 |
|
T104 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T102 |
44 |
|
T103 |
55 |
|
T104 |
40 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
846 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T102 |
40 |
|
T103 |
51 |
|
T104 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1718 |
1 |
|
|
T102 |
42 |
|
T103 |
55 |
|
T104 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T102 |
42 |
|
T103 |
54 |
|
T104 |
38 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
841 |
1 |
|
|
T102 |
26 |
|
T103 |
22 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T102 |
41 |
|
T103 |
54 |
|
T104 |
37 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
834 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T102 |
38 |
|
T103 |
47 |
|
T104 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T102 |
41 |
|
T103 |
51 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
834 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T102 |
37 |
|
T103 |
47 |
|
T104 |
32 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
814 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T102 |
40 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
829 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T102 |
35 |
|
T103 |
47 |
|
T104 |
31 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T102 |
39 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
829 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T102 |
35 |
|
T103 |
45 |
|
T104 |
29 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1447 |
1 |
|
|
T102 |
34 |
|
T103 |
44 |
|
T104 |
27 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T102 |
38 |
|
T103 |
47 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T102 |
34 |
|
T103 |
39 |
|
T104 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T102 |
37 |
|
T103 |
44 |
|
T104 |
36 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T102 |
34 |
|
T103 |
38 |
|
T104 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T102 |
37 |
|
T103 |
42 |
|
T104 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T102 |
34 |
|
T103 |
37 |
|
T104 |
26 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T102 |
36 |
|
T103 |
41 |
|
T104 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T102 |
33 |
|
T103 |
36 |
|
T104 |
25 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T102 |
35 |
|
T103 |
41 |
|
T104 |
34 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65486 |
1 |
|
|
T102 |
1305 |
|
T103 |
2355 |
|
T104 |
934 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43500 |
1 |
|
|
T102 |
1256 |
|
T103 |
855 |
|
T104 |
984 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68586 |
1 |
|
|
T102 |
1344 |
|
T103 |
1731 |
|
T104 |
928 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51624 |
1 |
|
|
T102 |
1796 |
|
T103 |
1119 |
|
T104 |
1650 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1842 |
1 |
|
|
T102 |
58 |
|
T103 |
56 |
|
T104 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1818 |
1 |
|
|
T102 |
59 |
|
T103 |
50 |
|
T104 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1801 |
1 |
|
|
T102 |
57 |
|
T103 |
53 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1791 |
1 |
|
|
T102 |
59 |
|
T103 |
50 |
|
T104 |
45 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T102 |
56 |
|
T103 |
51 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1748 |
1 |
|
|
T102 |
56 |
|
T103 |
49 |
|
T104 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
791 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T102 |
54 |
|
T103 |
50 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1710 |
1 |
|
|
T102 |
56 |
|
T103 |
46 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T102 |
52 |
|
T103 |
49 |
|
T104 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1676 |
1 |
|
|
T102 |
54 |
|
T103 |
45 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
19 |
|
T103 |
24 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T102 |
52 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1646 |
1 |
|
|
T102 |
53 |
|
T103 |
45 |
|
T104 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T102 |
52 |
|
T103 |
47 |
|
T104 |
39 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T102 |
52 |
|
T103 |
44 |
|
T104 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
780 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T102 |
50 |
|
T103 |
47 |
|
T104 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T102 |
50 |
|
T103 |
44 |
|
T104 |
37 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T102 |
49 |
|
T103 |
43 |
|
T104 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1520 |
1 |
|
|
T102 |
44 |
|
T103 |
43 |
|
T104 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T102 |
49 |
|
T103 |
42 |
|
T104 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T102 |
44 |
|
T103 |
41 |
|
T104 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T102 |
49 |
|
T103 |
41 |
|
T104 |
33 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T102 |
43 |
|
T103 |
40 |
|
T104 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1396 |
1 |
|
|
T102 |
47 |
|
T103 |
39 |
|
T104 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T102 |
43 |
|
T103 |
40 |
|
T104 |
36 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T102 |
46 |
|
T103 |
36 |
|
T104 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T102 |
41 |
|
T103 |
40 |
|
T104 |
35 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
769 |
1 |
|
|
T102 |
18 |
|
T103 |
23 |
|
T104 |
15 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1340 |
1 |
|
|
T102 |
45 |
|
T103 |
34 |
|
T104 |
32 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
18 |
|
T103 |
29 |
|
T104 |
14 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T102 |
39 |
|
T103 |
40 |
|
T104 |
34 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62091 |
1 |
|
|
T102 |
2083 |
|
T103 |
1775 |
|
T104 |
1014 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48137 |
1 |
|
|
T102 |
1021 |
|
T103 |
1005 |
|
T104 |
638 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
62922 |
1 |
|
|
T102 |
1476 |
|
T103 |
2450 |
|
T104 |
996 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54484 |
1 |
|
|
T102 |
1136 |
|
T103 |
1131 |
|
T104 |
1827 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1864 |
1 |
|
|
T102 |
58 |
|
T103 |
42 |
|
T104 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1909 |
1 |
|
|
T102 |
52 |
|
T103 |
45 |
|
T104 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
839 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1821 |
1 |
|
|
T102 |
54 |
|
T103 |
42 |
|
T104 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
794 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1875 |
1 |
|
|
T102 |
51 |
|
T103 |
45 |
|
T104 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1773 |
1 |
|
|
T102 |
53 |
|
T103 |
40 |
|
T104 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1841 |
1 |
|
|
T102 |
50 |
|
T103 |
45 |
|
T104 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
838 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1733 |
1 |
|
|
T102 |
52 |
|
T103 |
39 |
|
T104 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1793 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T102 |
49 |
|
T103 |
37 |
|
T104 |
37 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T102 |
49 |
|
T103 |
43 |
|
T104 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
833 |
1 |
|
|
T102 |
20 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1664 |
1 |
|
|
T102 |
46 |
|
T103 |
36 |
|
T104 |
34 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1730 |
1 |
|
|
T102 |
48 |
|
T103 |
43 |
|
T104 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T102 |
45 |
|
T103 |
35 |
|
T104 |
31 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T102 |
47 |
|
T103 |
43 |
|
T104 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
826 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T102 |
44 |
|
T103 |
34 |
|
T104 |
30 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
16 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1652 |
1 |
|
|
T102 |
47 |
|
T103 |
43 |
|
T104 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
825 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T102 |
44 |
|
T103 |
33 |
|
T104 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T102 |
44 |
|
T103 |
42 |
|
T104 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
825 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T102 |
43 |
|
T103 |
33 |
|
T104 |
29 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T102 |
44 |
|
T103 |
42 |
|
T104 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1473 |
1 |
|
|
T102 |
42 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T102 |
43 |
|
T103 |
42 |
|
T104 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T102 |
42 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1506 |
1 |
|
|
T102 |
42 |
|
T103 |
39 |
|
T104 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T102 |
41 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T102 |
39 |
|
T103 |
38 |
|
T104 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T102 |
39 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T102 |
39 |
|
T103 |
36 |
|
T104 |
36 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
19 |
|
T103 |
23 |
|
T104 |
18 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T102 |
38 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
25 |
|
T103 |
21 |
|
T104 |
15 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T102 |
38 |
|
T103 |
34 |
|
T104 |
36 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62806 |
1 |
|
|
T102 |
1191 |
|
T103 |
1590 |
|
T104 |
1379 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47628 |
1 |
|
|
T102 |
1206 |
|
T103 |
881 |
|
T104 |
763 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
68309 |
1 |
|
|
T102 |
1434 |
|
T103 |
2318 |
|
T104 |
1088 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49588 |
1 |
|
|
T102 |
1845 |
|
T103 |
1273 |
|
T104 |
1568 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1852 |
1 |
|
|
T102 |
61 |
|
T103 |
49 |
|
T104 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1828 |
1 |
|
|
T102 |
55 |
|
T103 |
50 |
|
T104 |
31 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1813 |
1 |
|
|
T102 |
61 |
|
T103 |
47 |
|
T104 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
834 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1789 |
1 |
|
|
T102 |
53 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1785 |
1 |
|
|
T102 |
59 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T102 |
52 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T102 |
57 |
|
T103 |
45 |
|
T104 |
34 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T102 |
50 |
|
T103 |
49 |
|
T104 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T102 |
57 |
|
T103 |
44 |
|
T104 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1687 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
27 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T102 |
57 |
|
T103 |
44 |
|
T104 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
831 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
26 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T102 |
56 |
|
T103 |
43 |
|
T104 |
32 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
25 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
798 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T102 |
55 |
|
T103 |
42 |
|
T104 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
824 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
24 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T102 |
54 |
|
T103 |
42 |
|
T104 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T102 |
47 |
|
T103 |
48 |
|
T104 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T102 |
50 |
|
T103 |
42 |
|
T104 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
822 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T102 |
46 |
|
T103 |
48 |
|
T104 |
23 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T102 |
50 |
|
T103 |
39 |
|
T104 |
29 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T102 |
46 |
|
T103 |
47 |
|
T104 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T102 |
49 |
|
T103 |
38 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1428 |
1 |
|
|
T102 |
44 |
|
T103 |
45 |
|
T104 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T102 |
48 |
|
T103 |
35 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T102 |
40 |
|
T103 |
43 |
|
T104 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T102 |
46 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T102 |
40 |
|
T103 |
41 |
|
T104 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
16 |
|
T103 |
27 |
|
T104 |
12 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T102 |
45 |
|
T103 |
33 |
|
T104 |
28 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
820 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
19 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T102 |
38 |
|
T103 |
41 |
|
T104 |
22 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63351 |
1 |
|
|
T102 |
1255 |
|
T103 |
1596 |
|
T104 |
960 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
60763 |
1 |
|
|
T102 |
1633 |
|
T103 |
1255 |
|
T104 |
862 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57112 |
1 |
|
|
T102 |
1825 |
|
T103 |
1293 |
|
T104 |
1166 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47032 |
1 |
|
|
T102 |
1051 |
|
T103 |
1959 |
|
T104 |
1543 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1914 |
1 |
|
|
T102 |
57 |
|
T103 |
56 |
|
T104 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1901 |
1 |
|
|
T102 |
56 |
|
T103 |
56 |
|
T104 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
768 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1877 |
1 |
|
|
T102 |
56 |
|
T103 |
56 |
|
T104 |
45 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
769 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1859 |
1 |
|
|
T102 |
53 |
|
T103 |
53 |
|
T104 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1845 |
1 |
|
|
T102 |
54 |
|
T103 |
56 |
|
T104 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1826 |
1 |
|
|
T102 |
53 |
|
T103 |
52 |
|
T104 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1815 |
1 |
|
|
T102 |
53 |
|
T103 |
56 |
|
T104 |
42 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1780 |
1 |
|
|
T102 |
51 |
|
T103 |
52 |
|
T104 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1793 |
1 |
|
|
T102 |
53 |
|
T103 |
56 |
|
T104 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1741 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
761 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1764 |
1 |
|
|
T102 |
52 |
|
T103 |
54 |
|
T104 |
41 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1696 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1725 |
1 |
|
|
T102 |
52 |
|
T103 |
53 |
|
T104 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T102 |
46 |
|
T103 |
48 |
|
T104 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1697 |
1 |
|
|
T102 |
51 |
|
T103 |
51 |
|
T104 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T102 |
45 |
|
T103 |
48 |
|
T104 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T102 |
51 |
|
T103 |
50 |
|
T104 |
38 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
36 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T102 |
47 |
|
T103 |
47 |
|
T104 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T102 |
41 |
|
T103 |
45 |
|
T104 |
37 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T102 |
47 |
|
T103 |
46 |
|
T104 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
758 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
16 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T102 |
40 |
|
T103 |
44 |
|
T104 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
32 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T102 |
39 |
|
T103 |
43 |
|
T104 |
35 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T102 |
35 |
|
T103 |
43 |
|
T104 |
33 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T102 |
18 |
|
T103 |
20 |
|
T104 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
30 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
757 |
1 |
|
|
T102 |
19 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T102 |
34 |
|
T103 |
41 |
|
T104 |
32 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65594 |
1 |
|
|
T102 |
1300 |
|
T103 |
1699 |
|
T104 |
1571 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48668 |
1 |
|
|
T102 |
965 |
|
T103 |
1935 |
|
T104 |
1046 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60709 |
1 |
|
|
T102 |
1780 |
|
T103 |
1175 |
|
T104 |
535 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51819 |
1 |
|
|
T102 |
1720 |
|
T103 |
1259 |
|
T104 |
1243 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1918 |
1 |
|
|
T102 |
45 |
|
T103 |
58 |
|
T104 |
50 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1898 |
1 |
|
|
T102 |
48 |
|
T103 |
58 |
|
T104 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
803 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1876 |
1 |
|
|
T102 |
45 |
|
T103 |
56 |
|
T104 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1865 |
1 |
|
|
T102 |
48 |
|
T103 |
57 |
|
T104 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1838 |
1 |
|
|
T102 |
45 |
|
T103 |
54 |
|
T104 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1834 |
1 |
|
|
T102 |
48 |
|
T103 |
54 |
|
T104 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
802 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1810 |
1 |
|
|
T102 |
45 |
|
T103 |
52 |
|
T104 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1799 |
1 |
|
|
T102 |
48 |
|
T103 |
54 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1774 |
1 |
|
|
T102 |
44 |
|
T103 |
50 |
|
T104 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1763 |
1 |
|
|
T102 |
47 |
|
T103 |
53 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1732 |
1 |
|
|
T102 |
43 |
|
T103 |
49 |
|
T104 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
816 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1731 |
1 |
|
|
T102 |
47 |
|
T103 |
52 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T102 |
45 |
|
T103 |
52 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
794 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1657 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
812 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T102 |
44 |
|
T103 |
50 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T102 |
40 |
|
T103 |
44 |
|
T104 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T102 |
42 |
|
T103 |
49 |
|
T104 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T102 |
37 |
|
T103 |
43 |
|
T104 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
807 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T102 |
42 |
|
T103 |
48 |
|
T104 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T102 |
36 |
|
T103 |
42 |
|
T104 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T102 |
36 |
|
T103 |
41 |
|
T104 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T102 |
40 |
|
T103 |
44 |
|
T104 |
44 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T102 |
35 |
|
T103 |
39 |
|
T104 |
36 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T102 |
39 |
|
T103 |
44 |
|
T104 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T102 |
33 |
|
T103 |
38 |
|
T104 |
34 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T102 |
38 |
|
T103 |
44 |
|
T104 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
786 |
1 |
|
|
T102 |
26 |
|
T103 |
23 |
|
T104 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T102 |
31 |
|
T103 |
37 |
|
T104 |
34 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T102 |
37 |
|
T103 |
44 |
|
T104 |
42 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
61568 |
1 |
|
|
T102 |
1254 |
|
T103 |
1573 |
|
T104 |
1966 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
55184 |
1 |
|
|
T102 |
1301 |
|
T103 |
1897 |
|
T104 |
580 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63987 |
1 |
|
|
T102 |
2059 |
|
T103 |
1671 |
|
T104 |
1545 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47344 |
1 |
|
|
T102 |
1110 |
|
T103 |
967 |
|
T104 |
693 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1874 |
1 |
|
|
T102 |
54 |
|
T103 |
55 |
|
T104 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1869 |
1 |
|
|
T102 |
51 |
|
T103 |
54 |
|
T104 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1841 |
1 |
|
|
T102 |
52 |
|
T103 |
55 |
|
T104 |
31 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1826 |
1 |
|
|
T102 |
47 |
|
T103 |
54 |
|
T104 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1804 |
1 |
|
|
T102 |
51 |
|
T103 |
55 |
|
T104 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1787 |
1 |
|
|
T102 |
46 |
|
T103 |
54 |
|
T104 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1767 |
1 |
|
|
T102 |
50 |
|
T103 |
54 |
|
T104 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
806 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1755 |
1 |
|
|
T102 |
45 |
|
T103 |
54 |
|
T104 |
30 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1735 |
1 |
|
|
T102 |
47 |
|
T103 |
52 |
|
T104 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1721 |
1 |
|
|
T102 |
44 |
|
T103 |
54 |
|
T104 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T102 |
47 |
|
T103 |
49 |
|
T104 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T102 |
41 |
|
T103 |
54 |
|
T104 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T102 |
46 |
|
T103 |
49 |
|
T104 |
25 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T102 |
40 |
|
T103 |
54 |
|
T104 |
29 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T102 |
44 |
|
T103 |
49 |
|
T104 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
800 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T102 |
39 |
|
T103 |
52 |
|
T104 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T102 |
42 |
|
T103 |
48 |
|
T104 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T102 |
39 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T102 |
42 |
|
T103 |
46 |
|
T104 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T102 |
42 |
|
T103 |
44 |
|
T104 |
24 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T102 |
41 |
|
T103 |
43 |
|
T104 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T102 |
38 |
|
T103 |
48 |
|
T104 |
26 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T102 |
40 |
|
T103 |
41 |
|
T104 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T102 |
38 |
|
T103 |
47 |
|
T104 |
23 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T102 |
40 |
|
T103 |
41 |
|
T104 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T102 |
37 |
|
T103 |
46 |
|
T104 |
22 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
792 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
18 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T102 |
40 |
|
T103 |
40 |
|
T104 |
20 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
26 |
|
T103 |
20 |
|
T104 |
17 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T102 |
36 |
|
T103 |
41 |
|
T104 |
22 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65518 |
1 |
|
|
T102 |
2633 |
|
T103 |
1112 |
|
T104 |
2032 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48948 |
1 |
|
|
T102 |
1016 |
|
T103 |
2129 |
|
T104 |
880 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
66609 |
1 |
|
|
T102 |
1466 |
|
T103 |
1493 |
|
T104 |
1051 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47227 |
1 |
|
|
T102 |
857 |
|
T103 |
1217 |
|
T104 |
751 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1856 |
1 |
|
|
T102 |
43 |
|
T103 |
65 |
|
T104 |
36 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1844 |
1 |
|
|
T102 |
41 |
|
T103 |
66 |
|
T104 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1817 |
1 |
|
|
T102 |
42 |
|
T103 |
63 |
|
T104 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
821 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1801 |
1 |
|
|
T102 |
39 |
|
T103 |
65 |
|
T104 |
35 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1784 |
1 |
|
|
T102 |
40 |
|
T103 |
63 |
|
T104 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1770 |
1 |
|
|
T102 |
38 |
|
T103 |
64 |
|
T104 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1750 |
1 |
|
|
T102 |
40 |
|
T103 |
62 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
819 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1733 |
1 |
|
|
T102 |
38 |
|
T103 |
63 |
|
T104 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1723 |
1 |
|
|
T102 |
40 |
|
T103 |
61 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1702 |
1 |
|
|
T102 |
38 |
|
T103 |
63 |
|
T104 |
33 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T102 |
38 |
|
T103 |
60 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
818 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T102 |
36 |
|
T103 |
62 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1645 |
1 |
|
|
T102 |
38 |
|
T103 |
57 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T102 |
36 |
|
T103 |
59 |
|
T104 |
32 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
804 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T102 |
35 |
|
T103 |
55 |
|
T104 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
815 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T102 |
36 |
|
T103 |
56 |
|
T104 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T102 |
34 |
|
T103 |
54 |
|
T104 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1548 |
1 |
|
|
T102 |
36 |
|
T103 |
53 |
|
T104 |
31 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
799 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T102 |
34 |
|
T103 |
48 |
|
T104 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
813 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T102 |
36 |
|
T103 |
52 |
|
T104 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T102 |
33 |
|
T103 |
46 |
|
T104 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T102 |
34 |
|
T103 |
52 |
|
T104 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T102 |
32 |
|
T103 |
46 |
|
T104 |
28 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T102 |
33 |
|
T103 |
50 |
|
T104 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T102 |
31 |
|
T103 |
46 |
|
T104 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T102 |
33 |
|
T103 |
50 |
|
T104 |
30 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T102 |
31 |
|
T103 |
45 |
|
T104 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T102 |
33 |
|
T103 |
48 |
|
T104 |
29 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
796 |
1 |
|
|
T102 |
23 |
|
T103 |
20 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T102 |
30 |
|
T103 |
44 |
|
T104 |
26 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
24 |
|
T103 |
18 |
|
T104 |
15 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T102 |
29 |
|
T103 |
48 |
|
T104 |
28 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
65578 |
1 |
|
|
T102 |
1491 |
|
T103 |
1092 |
|
T104 |
878 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49271 |
1 |
|
|
T102 |
1793 |
|
T103 |
1416 |
|
T104 |
1472 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64055 |
1 |
|
|
T102 |
1566 |
|
T103 |
1389 |
|
T104 |
1438 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
50277 |
1 |
|
|
T102 |
952 |
|
T103 |
2085 |
|
T104 |
826 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1856 |
1 |
|
|
T102 |
53 |
|
T103 |
66 |
|
T104 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1849 |
1 |
|
|
T102 |
52 |
|
T103 |
65 |
|
T104 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
789 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1819 |
1 |
|
|
T102 |
52 |
|
T103 |
65 |
|
T104 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1804 |
1 |
|
|
T102 |
51 |
|
T103 |
64 |
|
T104 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1777 |
1 |
|
|
T102 |
50 |
|
T103 |
61 |
|
T104 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1778 |
1 |
|
|
T102 |
50 |
|
T103 |
64 |
|
T104 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
788 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1746 |
1 |
|
|
T102 |
49 |
|
T103 |
61 |
|
T104 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T102 |
45 |
|
T103 |
61 |
|
T104 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1710 |
1 |
|
|
T102 |
46 |
|
T103 |
60 |
|
T104 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1697 |
1 |
|
|
T102 |
43 |
|
T103 |
60 |
|
T104 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
783 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T102 |
44 |
|
T103 |
59 |
|
T104 |
37 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
790 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1659 |
1 |
|
|
T102 |
43 |
|
T103 |
58 |
|
T104 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T102 |
44 |
|
T103 |
56 |
|
T104 |
34 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T102 |
41 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
774 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T102 |
43 |
|
T103 |
56 |
|
T104 |
33 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T102 |
40 |
|
T103 |
50 |
|
T104 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T102 |
41 |
|
T103 |
55 |
|
T104 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T102 |
39 |
|
T103 |
50 |
|
T104 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
767 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T102 |
41 |
|
T103 |
53 |
|
T104 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
32 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T102 |
41 |
|
T103 |
53 |
|
T104 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T102 |
39 |
|
T103 |
49 |
|
T104 |
31 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T102 |
41 |
|
T103 |
52 |
|
T104 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
18 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1455 |
1 |
|
|
T102 |
38 |
|
T103 |
46 |
|
T104 |
30 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T102 |
40 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T102 |
37 |
|
T103 |
45 |
|
T104 |
29 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T102 |
39 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T102 |
36 |
|
T103 |
45 |
|
T104 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
766 |
1 |
|
|
T102 |
22 |
|
T103 |
18 |
|
T104 |
16 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T102 |
39 |
|
T103 |
50 |
|
T104 |
26 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
781 |
1 |
|
|
T102 |
22 |
|
T103 |
19 |
|
T104 |
17 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T102 |
36 |
|
T103 |
45 |
|
T104 |
26 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59575 |
1 |
|
|
T102 |
1277 |
|
T103 |
1114 |
|
T104 |
1176 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53744 |
1 |
|
|
T102 |
1007 |
|
T103 |
2223 |
|
T104 |
641 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63691 |
1 |
|
|
T102 |
2151 |
|
T103 |
1582 |
|
T104 |
1464 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51627 |
1 |
|
|
T102 |
1226 |
|
T103 |
1101 |
|
T104 |
1372 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1831 |
1 |
|
|
T102 |
56 |
|
T103 |
58 |
|
T104 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1830 |
1 |
|
|
T102 |
53 |
|
T103 |
53 |
|
T104 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1796 |
1 |
|
|
T102 |
56 |
|
T103 |
55 |
|
T104 |
32 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1806 |
1 |
|
|
T102 |
53 |
|
T103 |
52 |
|
T104 |
31 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1756 |
1 |
|
|
T102 |
55 |
|
T103 |
54 |
|
T104 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1782 |
1 |
|
|
T102 |
53 |
|
T103 |
52 |
|
T104 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
815 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1713 |
1 |
|
|
T102 |
54 |
|
T103 |
53 |
|
T104 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1752 |
1 |
|
|
T102 |
52 |
|
T103 |
52 |
|
T104 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T102 |
54 |
|
T103 |
53 |
|
T104 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1726 |
1 |
|
|
T102 |
51 |
|
T103 |
52 |
|
T104 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
808 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1639 |
1 |
|
|
T102 |
51 |
|
T103 |
53 |
|
T104 |
30 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
808 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1691 |
1 |
|
|
T102 |
51 |
|
T103 |
52 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T102 |
51 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T102 |
50 |
|
T103 |
48 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
801 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T102 |
50 |
|
T103 |
50 |
|
T104 |
28 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T102 |
50 |
|
T103 |
48 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T102 |
48 |
|
T103 |
48 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T102 |
50 |
|
T103 |
48 |
|
T104 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T102 |
46 |
|
T103 |
46 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T102 |
50 |
|
T103 |
46 |
|
T104 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T102 |
45 |
|
T103 |
46 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T102 |
50 |
|
T103 |
44 |
|
T104 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T102 |
44 |
|
T103 |
44 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
799 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T102 |
49 |
|
T103 |
41 |
|
T104 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1374 |
1 |
|
|
T102 |
42 |
|
T103 |
44 |
|
T104 |
27 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1447 |
1 |
|
|
T102 |
48 |
|
T103 |
41 |
|
T104 |
23 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T102 |
40 |
|
T103 |
43 |
|
T104 |
26 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T102 |
46 |
|
T103 |
40 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
793 |
1 |
|
|
T102 |
19 |
|
T103 |
22 |
|
T104 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T102 |
36 |
|
T103 |
43 |
|
T104 |
25 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T102 |
22 |
|
T103 |
26 |
|
T104 |
22 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T102 |
44 |
|
T103 |
38 |
|
T104 |
22 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
63100 |
1 |
|
|
T102 |
1546 |
|
T103 |
1175 |
|
T104 |
1546 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48538 |
1 |
|
|
T102 |
1073 |
|
T103 |
1750 |
|
T104 |
730 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
64810 |
1 |
|
|
T102 |
1483 |
|
T103 |
1922 |
|
T104 |
1011 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52020 |
1 |
|
|
T102 |
1602 |
|
T103 |
1325 |
|
T104 |
1364 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1824 |
1 |
|
|
T102 |
55 |
|
T103 |
50 |
|
T104 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1836 |
1 |
|
|
T102 |
51 |
|
T103 |
53 |
|
T104 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1790 |
1 |
|
|
T102 |
55 |
|
T103 |
48 |
|
T104 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
811 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1808 |
1 |
|
|
T102 |
51 |
|
T103 |
52 |
|
T104 |
33 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1753 |
1 |
|
|
T102 |
54 |
|
T103 |
48 |
|
T104 |
35 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1784 |
1 |
|
|
T102 |
50 |
|
T103 |
52 |
|
T104 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
827 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1730 |
1 |
|
|
T102 |
52 |
|
T103 |
48 |
|
T104 |
34 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
810 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1749 |
1 |
|
|
T102 |
49 |
|
T103 |
51 |
|
T104 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1692 |
1 |
|
|
T102 |
50 |
|
T103 |
48 |
|
T104 |
32 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T102 |
48 |
|
T103 |
50 |
|
T104 |
31 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T102 |
50 |
|
T103 |
45 |
|
T104 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
809 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1680 |
1 |
|
|
T102 |
48 |
|
T103 |
50 |
|
T104 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T102 |
49 |
|
T103 |
44 |
|
T104 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T102 |
47 |
|
T103 |
48 |
|
T104 |
30 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
820 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T102 |
47 |
|
T103 |
44 |
|
T104 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
804 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T102 |
44 |
|
T103 |
48 |
|
T104 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T102 |
46 |
|
T103 |
40 |
|
T104 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T102 |
44 |
|
T103 |
48 |
|
T104 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
816 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T102 |
46 |
|
T103 |
39 |
|
T104 |
29 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1469 |
1 |
|
|
T102 |
44 |
|
T103 |
37 |
|
T104 |
28 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T102 |
36 |
|
T103 |
46 |
|
T104 |
24 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1430 |
1 |
|
|
T102 |
42 |
|
T103 |
36 |
|
T104 |
27 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T102 |
35 |
|
T103 |
46 |
|
T104 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T102 |
41 |
|
T103 |
36 |
|
T104 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T102 |
35 |
|
T103 |
46 |
|
T104 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T102 |
41 |
|
T103 |
34 |
|
T104 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T102 |
34 |
|
T103 |
45 |
|
T104 |
23 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
811 |
1 |
|
|
T102 |
21 |
|
T103 |
24 |
|
T104 |
18 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T102 |
40 |
|
T103 |
32 |
|
T104 |
26 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
25 |
|
T103 |
20 |
|
T104 |
21 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T102 |
33 |
|
T103 |
44 |
|
T104 |
23 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
66436 |
1 |
|
|
T102 |
1583 |
|
T103 |
2054 |
|
T104 |
1048 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53306 |
1 |
|
|
T102 |
1542 |
|
T103 |
834 |
|
T104 |
1067 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60412 |
1 |
|
|
T102 |
1728 |
|
T103 |
1646 |
|
T104 |
439 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48132 |
1 |
|
|
T102 |
1109 |
|
T103 |
1730 |
|
T104 |
1895 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1874 |
1 |
|
|
T102 |
43 |
|
T103 |
39 |
|
T104 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1876 |
1 |
|
|
T102 |
41 |
|
T103 |
44 |
|
T104 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
810 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1824 |
1 |
|
|
T102 |
42 |
|
T103 |
38 |
|
T104 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
797 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1840 |
1 |
|
|
T102 |
41 |
|
T103 |
43 |
|
T104 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1794 |
1 |
|
|
T102 |
41 |
|
T103 |
37 |
|
T104 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1805 |
1 |
|
|
T102 |
41 |
|
T103 |
43 |
|
T104 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1754 |
1 |
|
|
T102 |
39 |
|
T103 |
36 |
|
T104 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1762 |
1 |
|
|
T102 |
41 |
|
T103 |
42 |
|
T104 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1721 |
1 |
|
|
T102 |
39 |
|
T103 |
35 |
|
T104 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1734 |
1 |
|
|
T102 |
41 |
|
T103 |
42 |
|
T104 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
805 |
1 |
|
|
T102 |
23 |
|
T103 |
31 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1688 |
1 |
|
|
T102 |
39 |
|
T103 |
35 |
|
T104 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T102 |
39 |
|
T103 |
40 |
|
T104 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T102 |
38 |
|
T103 |
34 |
|
T104 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T102 |
39 |
|
T103 |
39 |
|
T104 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
800 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T102 |
36 |
|
T103 |
34 |
|
T104 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
787 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T102 |
38 |
|
T103 |
38 |
|
T104 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T102 |
34 |
|
T103 |
33 |
|
T104 |
37 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T102 |
37 |
|
T103 |
36 |
|
T104 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
795 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T102 |
31 |
|
T103 |
33 |
|
T104 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
784 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T102 |
34 |
|
T103 |
35 |
|
T104 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1510 |
1 |
|
|
T102 |
31 |
|
T103 |
32 |
|
T104 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T102 |
33 |
|
T103 |
35 |
|
T104 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T102 |
31 |
|
T103 |
31 |
|
T104 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
783 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T102 |
32 |
|
T103 |
35 |
|
T104 |
43 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T102 |
31 |
|
T103 |
30 |
|
T104 |
36 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T102 |
32 |
|
T103 |
34 |
|
T104 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1401 |
1 |
|
|
T102 |
31 |
|
T103 |
30 |
|
T104 |
35 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T102 |
32 |
|
T103 |
33 |
|
T104 |
38 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
790 |
1 |
|
|
T102 |
23 |
|
T103 |
30 |
|
T104 |
13 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T102 |
28 |
|
T103 |
28 |
|
T104 |
34 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
782 |
1 |
|
|
T102 |
24 |
|
T103 |
26 |
|
T104 |
12 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T102 |
32 |
|
T103 |
33 |
|
T104 |
37 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
71455 |
1 |
|
|
T102 |
2137 |
|
T103 |
1674 |
|
T104 |
1901 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48906 |
1 |
|
|
T102 |
1680 |
|
T103 |
1356 |
|
T104 |
1197 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58652 |
1 |
|
|
T102 |
1135 |
|
T103 |
1355 |
|
T104 |
711 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48618 |
1 |
|
|
T102 |
934 |
|
T103 |
1823 |
|
T104 |
815 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1871 |
1 |
|
|
T102 |
48 |
|
T103 |
52 |
|
T104 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1889 |
1 |
|
|
T102 |
52 |
|
T103 |
56 |
|
T104 |
45 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1822 |
1 |
|
|
T102 |
48 |
|
T103 |
51 |
|
T104 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
803 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1855 |
1 |
|
|
T102 |
51 |
|
T103 |
54 |
|
T104 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1791 |
1 |
|
|
T102 |
48 |
|
T103 |
49 |
|
T104 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1822 |
1 |
|
|
T102 |
50 |
|
T103 |
53 |
|
T104 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
830 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1747 |
1 |
|
|
T102 |
44 |
|
T103 |
48 |
|
T104 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
801 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1794 |
1 |
|
|
T102 |
50 |
|
T103 |
53 |
|
T104 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1720 |
1 |
|
|
T102 |
43 |
|
T103 |
47 |
|
T104 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1751 |
1 |
|
|
T102 |
50 |
|
T103 |
50 |
|
T104 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
823 |
1 |
|
|
T102 |
22 |
|
T103 |
23 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1681 |
1 |
|
|
T102 |
43 |
|
T103 |
46 |
|
T104 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
798 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T102 |
48 |
|
T103 |
48 |
|
T104 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1649 |
1 |
|
|
T102 |
43 |
|
T103 |
46 |
|
T104 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T102 |
47 |
|
T103 |
48 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
814 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T102 |
39 |
|
T103 |
45 |
|
T104 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
793 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T102 |
38 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T102 |
46 |
|
T103 |
45 |
|
T104 |
34 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
809 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T102 |
37 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
792 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T102 |
43 |
|
T103 |
44 |
|
T104 |
33 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1505 |
1 |
|
|
T102 |
36 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T102 |
43 |
|
T103 |
39 |
|
T104 |
31 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T102 |
36 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
791 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
11 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1476 |
1 |
|
|
T102 |
40 |
|
T103 |
38 |
|
T104 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T102 |
35 |
|
T103 |
42 |
|
T104 |
38 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T102 |
38 |
|
T103 |
37 |
|
T104 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T102 |
34 |
|
T103 |
41 |
|
T104 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T102 |
37 |
|
T103 |
37 |
|
T104 |
29 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
807 |
1 |
|
|
T102 |
22 |
|
T103 |
22 |
|
T104 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T102 |
33 |
|
T103 |
40 |
|
T104 |
37 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
789 |
1 |
|
|
T102 |
17 |
|
T103 |
19 |
|
T104 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T102 |
37 |
|
T103 |
36 |
|
T104 |
28 |