Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9054016 |
1 |
|
|
T1 |
1284 |
|
T11 |
421 |
|
T12 |
27247 |
| auto[1] |
7196113 |
1 |
|
|
T1 |
1126 |
|
T12 |
23876 |
|
T13 |
237621 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15323451 |
1 |
|
|
T1 |
2366 |
|
T11 |
421 |
|
T12 |
47707 |
| auto[1] |
926678 |
1 |
|
|
T1 |
44 |
|
T12 |
3416 |
|
T13 |
31988 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9050043 |
1 |
|
|
T1 |
1118 |
|
T11 |
421 |
|
T12 |
27293 |
| auto[1] |
7200086 |
1 |
|
|
T1 |
1292 |
|
T12 |
23830 |
|
T13 |
244547 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3136944 |
1 |
|
|
T1 |
582 |
|
T12 |
10305 |
|
T13 |
109491 |
| auto[1] |
auto[0] |
auto[1] |
462329 |
1 |
|
|
T1 |
21 |
|
T12 |
1718 |
|
T13 |
16634 |
| auto[1] |
auto[1] |
auto[0] |
3136464 |
1 |
|
|
T1 |
666 |
|
T12 |
10109 |
|
T13 |
103068 |
| auto[1] |
auto[1] |
auto[1] |
464349 |
1 |
|
|
T1 |
23 |
|
T12 |
1698 |
|
T13 |
15354 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |