Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9033997 |
1 |
|
|
T1 |
1237 |
|
T11 |
421 |
|
T12 |
28181 |
| auto[1] |
7216132 |
1 |
|
|
T1 |
1173 |
|
T12 |
22942 |
|
T13 |
246125 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
13359096 |
1 |
|
|
T1 |
2106 |
|
T11 |
421 |
|
T12 |
41512 |
| auto[1] |
2891033 |
1 |
|
|
T1 |
304 |
|
T12 |
9611 |
|
T13 |
93143 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9086855 |
1 |
|
|
T1 |
1199 |
|
T11 |
421 |
|
T12 |
28091 |
| auto[1] |
7163274 |
1 |
|
|
T1 |
1211 |
|
T12 |
23032 |
|
T13 |
244959 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2132821 |
1 |
|
|
T1 |
410 |
|
T12 |
6870 |
|
T13 |
74074 |
| auto[1] |
auto[0] |
auto[1] |
1445079 |
1 |
|
|
T1 |
170 |
|
T12 |
4840 |
|
T13 |
45223 |
| auto[1] |
auto[1] |
auto[0] |
2139420 |
1 |
|
|
T1 |
497 |
|
T12 |
6551 |
|
T13 |
77742 |
| auto[1] |
auto[1] |
auto[1] |
1445954 |
1 |
|
|
T1 |
134 |
|
T12 |
4771 |
|
T13 |
47920 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |