Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9070838 |
1 |
|
|
T1 |
1024 |
|
T11 |
421 |
|
T12 |
28932 |
| auto[1] |
7179291 |
1 |
|
|
T1 |
1386 |
|
T12 |
22191 |
|
T13 |
245787 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15324504 |
1 |
|
|
T1 |
2373 |
|
T11 |
421 |
|
T12 |
47543 |
| auto[1] |
925625 |
1 |
|
|
T1 |
37 |
|
T12 |
3580 |
|
T13 |
31938 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9056975 |
1 |
|
|
T1 |
1129 |
|
T11 |
421 |
|
T12 |
26359 |
| auto[1] |
7193154 |
1 |
|
|
T1 |
1281 |
|
T12 |
24764 |
|
T13 |
243019 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3140031 |
1 |
|
|
T1 |
522 |
|
T12 |
11090 |
|
T13 |
103803 |
| auto[1] |
auto[0] |
auto[1] |
464052 |
1 |
|
|
T1 |
18 |
|
T12 |
1960 |
|
T13 |
15608 |
| auto[1] |
auto[1] |
auto[0] |
3127498 |
1 |
|
|
T1 |
722 |
|
T12 |
10094 |
|
T13 |
107278 |
| auto[1] |
auto[1] |
auto[1] |
461573 |
1 |
|
|
T1 |
19 |
|
T12 |
1620 |
|
T13 |
16330 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |