Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9057550 |
1 |
|
|
T1 |
1255 |
|
T11 |
421 |
|
T12 |
27835 |
| auto[1] |
7192579 |
1 |
|
|
T1 |
1155 |
|
T12 |
23288 |
|
T13 |
243571 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
15319597 |
1 |
|
|
T1 |
2375 |
|
T11 |
421 |
|
T12 |
47976 |
| auto[1] |
930532 |
1 |
|
|
T1 |
35 |
|
T12 |
3147 |
|
T13 |
32034 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9022166 |
1 |
|
|
T1 |
1224 |
|
T11 |
421 |
|
T12 |
28849 |
| auto[1] |
7227963 |
1 |
|
|
T1 |
1186 |
|
T12 |
22274 |
|
T13 |
243892 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3147237 |
1 |
|
|
T1 |
622 |
|
T12 |
9374 |
|
T13 |
105059 |
| auto[1] |
auto[0] |
auto[1] |
464607 |
1 |
|
|
T1 |
18 |
|
T12 |
1534 |
|
T13 |
15719 |
| auto[1] |
auto[1] |
auto[0] |
3150194 |
1 |
|
|
T1 |
529 |
|
T12 |
9753 |
|
T13 |
106799 |
| auto[1] |
auto[1] |
auto[1] |
465925 |
1 |
|
|
T1 |
17 |
|
T12 |
1613 |
|
T13 |
16315 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |