Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10004050 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
181 |
| auto[1] |
7705668 |
1 |
|
|
T24 |
185 |
|
T1 |
38618 |
|
T11 |
1042 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14551177 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
257 |
| auto[1] |
3158541 |
1 |
|
|
T24 |
109 |
|
T1 |
24279 |
|
T11 |
729 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10032616 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
194 |
| auto[1] |
7677102 |
1 |
|
|
T24 |
172 |
|
T1 |
38448 |
|
T11 |
936 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2259325 |
1 |
|
|
T24 |
34 |
|
T1 |
7139 |
|
T11 |
116 |
| auto[1] |
auto[0] |
auto[1] |
1579087 |
1 |
|
|
T24 |
48 |
|
T1 |
12653 |
|
T11 |
383 |
| auto[1] |
auto[1] |
auto[0] |
2259236 |
1 |
|
|
T24 |
29 |
|
T1 |
7030 |
|
T11 |
91 |
| auto[1] |
auto[1] |
auto[1] |
1579454 |
1 |
|
|
T24 |
61 |
|
T1 |
11626 |
|
T11 |
346 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |