Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10004320 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
194 |
| auto[1] |
7705398 |
1 |
|
|
T24 |
172 |
|
T1 |
37724 |
|
T11 |
833 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14559960 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
278 |
| auto[1] |
3149758 |
1 |
|
|
T24 |
88 |
|
T1 |
23836 |
|
T11 |
830 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10057469 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
196 |
| auto[1] |
7652249 |
1 |
|
|
T24 |
170 |
|
T1 |
37728 |
|
T11 |
1150 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2244327 |
1 |
|
|
T24 |
42 |
|
T1 |
6738 |
|
T11 |
203 |
| auto[1] |
auto[0] |
auto[1] |
1565426 |
1 |
|
|
T24 |
45 |
|
T1 |
11819 |
|
T11 |
469 |
| auto[1] |
auto[1] |
auto[0] |
2258164 |
1 |
|
|
T24 |
40 |
|
T1 |
7154 |
|
T11 |
117 |
| auto[1] |
auto[1] |
auto[1] |
1584332 |
1 |
|
|
T24 |
43 |
|
T1 |
12017 |
|
T11 |
361 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |