Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9994991 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
229 |
| auto[1] |
7714727 |
1 |
|
|
T24 |
137 |
|
T1 |
38479 |
|
T11 |
1191 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14545958 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
298 |
| auto[1] |
3163760 |
1 |
|
|
T24 |
68 |
|
T1 |
23127 |
|
T11 |
741 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10005830 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
201 |
| auto[1] |
7703888 |
1 |
|
|
T24 |
165 |
|
T1 |
36915 |
|
T11 |
1014 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2264970 |
1 |
|
|
T24 |
63 |
|
T1 |
7273 |
|
T11 |
138 |
| auto[1] |
auto[0] |
auto[1] |
1578616 |
1 |
|
|
T24 |
54 |
|
T1 |
11568 |
|
T11 |
263 |
| auto[1] |
auto[1] |
auto[0] |
2275158 |
1 |
|
|
T24 |
34 |
|
T1 |
6515 |
|
T11 |
135 |
| auto[1] |
auto[1] |
auto[1] |
1585144 |
1 |
|
|
T24 |
14 |
|
T1 |
11559 |
|
T11 |
478 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |