Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10012808 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
168 |
| auto[1] |
7696910 |
1 |
|
|
T24 |
198 |
|
T1 |
36611 |
|
T11 |
1137 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14544302 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
259 |
| auto[1] |
3165416 |
1 |
|
|
T24 |
107 |
|
T1 |
23487 |
|
T11 |
999 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10008128 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
176 |
| auto[1] |
7701590 |
1 |
|
|
T24 |
190 |
|
T1 |
37620 |
|
T11 |
1254 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2279239 |
1 |
|
|
T24 |
46 |
|
T1 |
7470 |
|
T11 |
117 |
| auto[1] |
auto[0] |
auto[1] |
1589191 |
1 |
|
|
T24 |
48 |
|
T1 |
12568 |
|
T11 |
473 |
| auto[1] |
auto[1] |
auto[0] |
2256935 |
1 |
|
|
T24 |
37 |
|
T1 |
6663 |
|
T11 |
138 |
| auto[1] |
auto[1] |
auto[1] |
1576225 |
1 |
|
|
T24 |
59 |
|
T1 |
10919 |
|
T11 |
526 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |