Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10034064 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
161 |
| auto[1] |
7675654 |
1 |
|
|
T24 |
205 |
|
T1 |
37648 |
|
T11 |
1041 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
16717201 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
355 |
| auto[1] |
992517 |
1 |
|
|
T24 |
11 |
|
T1 |
4704 |
|
T11 |
36 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
9992071 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
164 |
| auto[1] |
7717647 |
1 |
|
|
T24 |
202 |
|
T1 |
38673 |
|
T11 |
902 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3384973 |
1 |
|
|
T24 |
75 |
|
T1 |
17297 |
|
T11 |
373 |
| auto[1] |
auto[0] |
auto[1] |
500630 |
1 |
|
|
T24 |
3 |
|
T1 |
2401 |
|
T11 |
14 |
| auto[1] |
auto[1] |
auto[0] |
3340157 |
1 |
|
|
T24 |
116 |
|
T1 |
16672 |
|
T11 |
493 |
| auto[1] |
auto[1] |
auto[1] |
491887 |
1 |
|
|
T24 |
8 |
|
T1 |
2303 |
|
T11 |
22 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |