Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10028699 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
189 |
| auto[1] |
7681019 |
1 |
|
|
T24 |
177 |
|
T1 |
39011 |
|
T11 |
980 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14553623 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
284 |
| auto[1] |
3156095 |
1 |
|
|
T24 |
82 |
|
T1 |
24929 |
|
T11 |
709 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10039281 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
180 |
| auto[1] |
7670437 |
1 |
|
|
T24 |
186 |
|
T1 |
38931 |
|
T11 |
877 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
2265933 |
1 |
|
|
T24 |
48 |
|
T1 |
6817 |
|
T11 |
108 |
| auto[1] |
auto[0] |
auto[1] |
1578972 |
1 |
|
|
T24 |
51 |
|
T1 |
12175 |
|
T11 |
344 |
| auto[1] |
auto[1] |
auto[0] |
2248409 |
1 |
|
|
T24 |
56 |
|
T1 |
7185 |
|
T11 |
60 |
| auto[1] |
auto[1] |
auto[1] |
1577123 |
1 |
|
|
T24 |
31 |
|
T1 |
12754 |
|
T11 |
365 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |