Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10014953 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
220 |
| auto[1] |
7694765 |
1 |
|
|
T24 |
146 |
|
T1 |
39017 |
|
T11 |
969 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
16723254 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
357 |
| auto[1] |
986464 |
1 |
|
|
T24 |
9 |
|
T1 |
4674 |
|
T11 |
47 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10027841 |
1 |
|
|
T22 |
425 |
|
T23 |
1199 |
|
T24 |
179 |
| auto[1] |
7681877 |
1 |
|
|
T24 |
187 |
|
T1 |
38783 |
|
T11 |
959 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3351113 |
1 |
|
|
T24 |
114 |
|
T1 |
17362 |
|
T11 |
478 |
| auto[1] |
auto[0] |
auto[1] |
491770 |
1 |
|
|
T24 |
6 |
|
T1 |
2420 |
|
T11 |
24 |
| auto[1] |
auto[1] |
auto[0] |
3344300 |
1 |
|
|
T24 |
64 |
|
T1 |
16747 |
|
T11 |
434 |
| auto[1] |
auto[1] |
auto[1] |
494694 |
1 |
|
|
T24 |
3 |
|
T1 |
2254 |
|
T11 |
23 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |