Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7451354 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
65651 |
| auto[1] |
5302540 |
1 |
|
|
T23 |
49856 |
|
T24 |
18 |
|
T26 |
58247 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10560002 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
82654 |
| auto[1] |
2193892 |
1 |
|
|
T23 |
32853 |
|
T24 |
17 |
|
T26 |
20568 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7440399 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
62438 |
| auto[1] |
5313495 |
1 |
|
|
T23 |
53069 |
|
T24 |
18 |
|
T26 |
54000 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1561407 |
1 |
|
|
T23 |
10396 |
|
T26 |
16092 |
|
T29 |
46 |
| auto[1] |
auto[0] |
auto[1] |
1099901 |
1 |
|
|
T23 |
16486 |
|
T24 |
8 |
|
T26 |
10030 |
| auto[1] |
auto[1] |
auto[0] |
1558196 |
1 |
|
|
T23 |
9820 |
|
T24 |
1 |
|
T26 |
17340 |
| auto[1] |
auto[1] |
auto[1] |
1093991 |
1 |
|
|
T23 |
16367 |
|
T24 |
9 |
|
T26 |
10538 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |