Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7442233 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
64526 |
| auto[1] |
5311661 |
1 |
|
|
T23 |
50981 |
|
T24 |
8 |
|
T26 |
57697 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
10569533 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
82996 |
| auto[1] |
2184361 |
1 |
|
|
T23 |
32511 |
|
T26 |
21444 |
|
T29 |
168 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
7482620 |
1 |
|
|
T21 |
31 |
|
T22 |
97 |
|
T23 |
63891 |
| auto[1] |
5271274 |
1 |
|
|
T23 |
51616 |
|
T24 |
1 |
|
T26 |
57377 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
1533454 |
1 |
|
|
T23 |
9411 |
|
T24 |
1 |
|
T26 |
17294 |
| auto[1] |
auto[0] |
auto[1] |
1089051 |
1 |
|
|
T23 |
16199 |
|
T26 |
10641 |
|
T29 |
101 |
| auto[1] |
auto[1] |
auto[0] |
1553459 |
1 |
|
|
T23 |
9694 |
|
T26 |
18639 |
|
T29 |
51 |
| auto[1] |
auto[1] |
auto[1] |
1095310 |
1 |
|
|
T23 |
16312 |
|
T26 |
10803 |
|
T29 |
67 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |